Patents by Inventor Arun Kumar Barman

Arun Kumar Barman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10839877
    Abstract: A protection module for an electronic circuit prevents unintended write operations by a master module to functional registers of a protected module. The protection module includes soft lock bits (SLBs) that indicate whether corresponding functional registers are locked and control logic that supports (i) a page select (PS) control parameter that indicates whether access by the master module is to the functional registers or the SLBs and (ii) a mode select (MS) control parameter that indicates whether access by the master module to the functional registers is in a normal access mode, in which each written-to functional register is left unlocked, or an auto-lock access mode, in which each just-written-to functional register is automatically locked by setting the corresponding SLB. The functional registers and the SLBs share addresses that can fit within a single address space that includes the control parameters.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: November 17, 2020
    Assignee: NXP USA, INC.
    Inventors: Arun Kumar Barman, Parul Bansal, Jhalak Gupta
  • Publication number: 20200342924
    Abstract: A protection module for an electronic circuit prevents unintended write operations by a master module to functional registers of a protected module. The protection module includes soft lock bits (SLBs) that indicate whether corresponding functional registers are locked and control logic that supports (i) a page select (PS) control parameter that indicates whether access by the master module is to the functional registers or the SLBs and (ii) a mode select (MS) control parameter that indicates whether access by the master module to the functional registers is in a normal access mode, in which each written-to functional register is left unlocked, or an auto-lock access mode, in which each just-written-to functional register is automatically locked by setting the corresponding SLB. The functional registers and the SLBs share addresses that can fit within a single address space that includes the control parameters.
    Type: Application
    Filed: April 23, 2019
    Publication date: October 29, 2020
    Inventors: Arun Kumar Barman, Parul Bansal, Jhalak Gupta
  • Patent number: 9360883
    Abstract: A fully digital glitch-free clock multiplexer includes a monitoring circuit that automatically switches to a newly selected clock, after a defined time period, from a currently selected clock, when the currently selected clock is absent. A maximum time limit is calculated based on a min and max clock frequency ratio. The monitoring circuit operates only when the clock is being switched. This provides flexibility to software to switch the clock any time whether or not the current clock is present, and prevents the system from hanging in the absence of the clock.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: June 7, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Arun Kumar Barman, Vivek Sharma