Abstract: Hydrogel nanobeads include an ionically crosslinked sulfated polysaccharide biopolymer such as a carrageenan. In an embodiment, the hydrogel nanobeads comprise kappa carrageenan (?Cg) and a metal ion crosslinking agent. In an embodiment, the metal ion crosslinking agent includes a metal ion selected from the group consisting of Zn2+, Fe2+, Fe3+, and Ti3+. The hydrogel nanobeads can be used for removal of pollutants in wastewater.

Abstract: Hydrogel nanobeads include an ionically crosslinked sulfated polysaccharide biopolymer such as a carrageenan. In an embodiment, the hydrogel nanobeads comprise kappa carrageenan (?Cg) and a metal ion crosslinking agent. In an embodiment, the metal ion crosslinking agent includes a metal ion selected from the group consisting of Zn2+, Fe2+, Fe3+, and Ti3+. The hydrogel nanobeads can be used for removal of pollutants in wastewater.

Abstract: Hydrogel nanobeads include an ionically crosslinked sulfated polysaccharide biopolymer such as a carrageenan. In an embodiment, the hydrogel nanobeads comprise kappa carrageenan (KCg) and a metal ion crosslinking agent. In an embodiment, the metal ion crosslinking agent includes a metal ion selected from the group consisting of Zn2+, Fe2+, Fe3+, and Ti3+. The hydrogel nanobeads can be used for removal of pollutants in wastewater.

Abstract: Hydrogel nanobeads include an ionically crosslinked sulfated polysaccharide biopolymer such as a carrageenan. In an embodiment, the hydrogel nanobeads comprise kappa carrageenan (?Cg) and a metal ion crosslinking agent. In an embodiment, the metal ion crosslinking agent includes a metal ion selected from the group consisting of Zn2+, Fe2+, Fe3+, and Ti3+. The hydrogel nanobeads can be used for removal of pollutants in wastewater.

Abstract: Systems, methods, and data storage devices for data recovery from network storage systems are described. The data storage device may include a host data channel for data transfer with the host and a network data channel for data transfer with the network storage system over a network. Responsive to a read error when reading a data unit, the data storage device establishes a secure data transfer connection with the network storage system to request the failed data unit from the network storage system. The data unit retrieved from the network storage system may be used to respond to the original read request and restore the data unit in the data storage device.

Abstract: A media playback device is configured to control access to a plurality of files. The media playback device includes memory configured to store a plurality of files, the plurality of files including at least a first set of files and a second set of files, the second set of files having a higher security level the first set of files. The media playback device also includes control circuitry that can be configured to receive a first login from a user, determine that the first login is associated with a user profile associated with the first set of files and the second set of files, provide access to the first set of files in response to validating the first login while keeping the second set of files locked, receive a second login, and provide access to the second set of files in response to validating the second login.

Abstract: A data storage device and method for host-initiated cached read to recover corrupted data within timeout constraints are provided. In one embodiment, a data storage device is provided comprising a volatile memory, a non-volatile memory, and a controller. The controller is configured to receive a read look-ahead command from a host to perform a read look-ahead of a first logical address; receive a read command from the host to read a second logical address; and execute the read look-ahead command by performing the following as background operations while executing the read command: read data for a location in the non-volatile memory that corresponds to the first logical address; correct an error in the data; and cache the corrected data in the volatile memory. The cached corrected data can be sent back to the host in response to the host requesting a read of the same logical address. Other embodiments are provided.

Abstract: Systems, methods, and data storage devices for data recovery from network storage systems are described. The data storage device may include a host data channel for data transfer with the host and a network data channel for data transfer with the network storage system over a network. Responsive to a read error when reading a data unit, the data storage device establishes a secure data transfer connection with the network storage system to request the failed data unit from the network storage system. The data unit retrieved from the network storage system may be used to respond to the original read request and restore the data unit in the data storage device.

Abstract: A data storage device and method for host-initiated cached read to recover corrupted data within timeout constraints are provided. In one embodiment, a data storage device is provided comprising a volatile memory, a non-volatile memory, and a controller. The controller is configured to receive a read look-ahead command from a host to perform a read look-ahead of a first logical address; receive a read command from the host to read a second logical address; and execute the read look-ahead command by performing the following as background operations while executing the read command: read data for a location in the non-volatile memory that corresponds to the first logical address; correct an error in the data; and cache the corrected data in the volatile memory. The cached corrected data can be sent back to the host in response to the host requesting a read of the same logical address. Other embodiments are provided.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for hybrid dual write. An apparatus includes a memory device comprising a plurality of single level cell blocks and a plurality of multi level cell blocks. An apparatus includes a hybrid writing component. A hybrid writing component includes a single level writing circuit that writes data to a plurality of single level cell blocks. A hybrid writing component includes a multi level writing circuit that copies data from a plurality of single level cell blocks to a plurality of multi level cell blocks. A hybrid writing component includes a control circuit that controls data to be copied from a single level cell block of a plurality of single level cell blocks to at least two multi level cell blocks of a plurality of multi level cell blocks.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for hybrid dual write. An apparatus includes a memory device comprising a plurality of single level cell blocks and a plurality of multi level cell blocks. An apparatus includes a hybrid writing component. A hybrid writing component includes a single level writing circuit that writes data to a plurality of single level cell blocks. A hybrid writing component includes a multi level writing circuit that copies data from a plurality of single level cell blocks to a plurality of multi level cell blocks. A hybrid writing component includes an allocation circuit that allocates a single level cell block of a plurality of single level cell blocks to a first stream in response to a multi level cell block of a plurality of multi level cell block being allocated to the first stream.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for hybrid dual write. An apparatus includes a memory device comprising a plurality of single level cell blocks and a plurality of multi level cell blocks. An apparatus includes a hybrid writing component. A hybrid writing component includes a single level writing circuit that writes data to a plurality of single level cell blocks. A hybrid writing component includes a multi level writing circuit that copies data from a plurality of single level cell blocks to a plurality of multi level cell blocks. A hybrid writing component includes a grouping circuit that directs a single level writing circuit to write data corresponding to a first logical group to a set of single level cell blocks of a plurality of single level cell blocks.

Abstract: Polyvinyl difluoride (PVDF) membranes prepared from casting solution including the biopolymer kappa-carrageenan (kCg) as an additive demonstrate improved structure and properties. The resulting asymmetrical structure has a thin layer on the upper surface, a porous sublayer with reduced volume of macro void space and increased porosity, and a spongy layer beneath the sublayer. This results in an increased hydrophilic nature, and provides enhanced wetting, membrane porosity, and water permeability—all important properties making these membranes suitable for a wide range of uses.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for hybrid dual write. An apparatus includes a memory device comprising a plurality of single level cell blocks and a plurality of multi level cell blocks. An apparatus includes a hybrid writing component. A hybrid writing component includes a single level writing circuit that writes data to a plurality of single level cell blocks. A hybrid writing component includes a multi level writing circuit that copies data from a plurality of single level cell blocks to a plurality of multi level cell blocks. A hybrid writing component includes an allocation circuit that allocates a single level cell block of a plurality of single level cell blocks to a first stream in response to a multi level cell block of a plurality of multi level cell block being allocated to the first stream.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for hybrid dual write. An apparatus includes a memory device comprising a plurality of single level cell blocks and a plurality of multi level cell blocks. An apparatus includes a hybrid writing component. A hybrid writing component includes a single level writing circuit that writes data to a plurality of single level cell blocks. A hybrid writing component includes a multi level writing circuit that copies data from a plurality of single level cell blocks to a plurality of multi level cell blocks. A hybrid writing component includes a control circuit that controls data to be copied from a single level cell block of a plurality of single level cell blocks to at least two multi level cell blocks of a plurality of multi level cell blocks.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for hybrid dual write. An apparatus includes a memory device comprising a plurality of single level cell blocks and a plurality of multi level cell blocks. An apparatus includes a hybrid writing component. A hybrid writing component includes a single level writing circuit that writes data to a plurality of single level cell blocks. A hybrid writing component includes a multi level writing circuit that copies data from a plurality of single level cell blocks to a plurality of multi level cell blocks. A hybrid writing component includes a grouping circuit that directs a single level writing circuit to write data corresponding to a first logical group to a set of single level cell blocks of a plurality of single level cell blocks.