Patents by Inventor Arun Natarajan
Arun Natarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9030354Abstract: A method and structure for a phased-array system. An orthogonal signal generator generates a plurality of signals C(i) that are orthogonal or near-orthogonal, meaning that a cross correlation between any two signals C(i) is lower than autocorrelation, and there is a plurality of phased-array antenna elements, each said antenna element providing a signal Sinp(i). A multiplier multiplies each signal C(i) with the signal Sinp(i) of a corresponding one of the plurality of phased array antenna elements.Type: GrantFiled: March 12, 2012Date of Patent: May 12, 2015Assignee: International Business Machines CorporationInventors: Arun Natarajan, Scott Reynolds
-
Patent number: 8629701Abstract: A method and system for compensating for offsets when measuring parameters of a phase-locked loop (PLL). In one embodiment, a proportional path in the PLL is temporarily shut off, a measurement is made of a real time-to-zero crossing in the PLL to measure a defined parameter of the PLL, the proportional path is switched on, and the defined loop parameter is adjusted based on this measurement. In one embodiment, the real time-to-zero crossing is measured after introducing a phase step into the PLL between a reference signal and an output signal of the PLL. In an embodiment, two phase steps, having opposite polarities, are successively introduced into the PLL, and the time-to-crossing measurements resulting from these two phase steps may be averaged, and this average is used to determine a loop parameter.Type: GrantFiled: July 22, 2013Date of Patent: January 14, 2014Assignee: International Business Machines CorporationInventors: Mark A. Ferriss, Arun Natarajan, Benjamin Parker, Alexander Rylyakov, Jose A. Tierno, Soner Yaldiz
-
Patent number: 8606454Abstract: A control system and method is provided for synchronized control of a harvester and transport vehicle during unload on the go operation. The control system can maintain a desired lateral distance between the harvester and transport vehicle using swath information that is used to steer the harvester. In addition, the control system can also bring a transport vehicle into appropriate alignment with the harvester using the same swath information.Type: GrantFiled: June 29, 2011Date of Patent: December 10, 2013Assignee: CNH America LLCInventors: Guoping Wang, Todd Aznavorian, Arun Natarajan, Kousha Moaveni Nejad
-
Publication number: 20130307588Abstract: A method and system for compensating for offsets when measuring parameters of a phase-locked loop (PLL). In one embodiment, a proportional path in the PLL is temporarily shut off, a measurement is made of a real time-to-zero crossing in the PLL to measure a defined parameter of the PLL, the proportional path is switched on, and the defined loop parameter is adjusted based on this measurement. In one embodiment, the real time-to-zero crossing is measured after introducing a phase step into the PLL between a reference signal and an output signal of the PLL. In an embodiment, two phase steps, having opposite polarities, are successively introduced into the PLL, and the time-to-crossing measurements resulting from these two phase steps may be averaged, and this average is used to determine a loop parameter.Type: ApplicationFiled: July 22, 2013Publication date: November 21, 2013Applicant: International Business Machines CorporationInventors: Mark A. Ferriss, Arun Natarajan, Benjamin Parker, Alexander Rylyakov, Jose A. Tierno, Soner Yaldiz
-
Publication number: 20130234891Abstract: A method and structure for a phased-array system. An orthogonal signal generator generates a plurality of signals C(i) that are orthogonal or near-orthogonal, meaning that a cross correlation between any two signals C(i) is lower than autocorrelation, and there is a plurality of phased-array antenna elements, each said antenna element providing a signal Sinp(i). A multiplier multiplies each signal C(i) with the signal Sinp(i) of a corresponding one of the plurality of phased array antenna elements.Type: ApplicationFiled: March 12, 2012Publication date: September 12, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Arun Natarajan, Scott Reynolds
-
Patent number: 8517692Abstract: A method of controlling pressure in a mud pump system includes generating a pressure limiting factor output using a pressure feedback input and a motor speed input to calculate a fluid conductance estimate, maintaining the pressure limiting factor output at a maximum value based on a pressure set-point, continuously updating a normal fluid conductance value based on the fluid conductance estimate while the pressure limiting factor output remains at the maximum value, freezing the normal fluid conductance value, if the pressure limiting factor output is less than the maximum value, calculating a change in fluid conductance based on the normal fluid conductance value and the fluid conductance estimate, generating at least one adaptive gain based on the change in fluid conductance, and controlling a motor speed of a pump in the mud pump system based on the at least one adaptive gain.Type: GrantFiled: August 25, 2010Date of Patent: August 27, 2013Assignee: Omron Oilfield & Marine, Inc.Inventors: Fergus Hopwood, Arun Natarajan
-
Patent number: 8493113Abstract: A method and system for compensating for offsets when measuring parameters of a phase-locked loop (PLL). In one embodiment, a proportional path in the PLL is temporarily shut off, a measurement is made of a real time-to-zero crossing in the PLL to measure a defined parameter of the PLL, the proportional path is switched on, and the defined loop parameter is adjusted based on this measurement. In one embodiment, the real time-to-zero crossing is measured after introducing a phase step into the PLL between a reference signal and an output signal of the PLL. In an embodiment, two phase steps, having opposite polarities, are successively introduced into the PLL, and the time-to-crossing measurements resulting from these two phase steps may be averaged, and this average is used to determine a loop parameter.Type: GrantFiled: September 12, 2011Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Mark A. Ferriss, Arun Natarajan, Benjamin Parker, Alexander Rylyakov, Jose A. Tierno, Soner Yaldiz
-
Publication number: 20130063192Abstract: A method and system for compensating for offsets when measuring parameters of a phase-locked loop (PLL). In one embodiment, a proportional path in the PLL is temporarily shut off, a measurement is made of a real time-to-zero crossing in the PLL to measure a defined parameter of the PLL, the proportional path is switched on, and the defined loop parameter is adjusted based on this measurement. In one embodiment, the real time-to-zero crossing is measured after introducing a phase step into the PLL between a reference signal and an output signal of the PLL. In an embodiment, two phase steps, having opposite polarities, are successively introduced into the PLL, and the time-to-crossing measurements resulting from these two phase steps may be averaged, and this average is used to determine a loop parameter.Type: ApplicationFiled: September 12, 2011Publication date: March 14, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mark A. Ferriss, Arun Natarajan, Benjamin Parker, Alexander Rylyakov, Jose A. Tierno, Soner Yaldiz
-
Publication number: 20120215381Abstract: A control system and method is provided for synchronized control of a harvester and transport vehicle during unload on the go operation. The control system can maintain a desired lateral distance between the harvester and transport vehicle using swath information that is used to steer the harvester. In addition, the control system can also bring a transport vehicle into appropriate alignment with the harvester using the same swath information.Type: ApplicationFiled: June 29, 2011Publication date: August 23, 2012Inventors: Guoping WANG, Todd Aznavorian, Arun Natarajan, Kousha Moaveni Nejad
-
Publication number: 20120215394Abstract: A control system and method is provided to control a longitudinal position of a transport vehicle relative to a harvester during an unload on the go operation and to control both the lateral position and the longitudinal position of a transport vehicle relative to a harvester during an unload on the go operation to evenly fill a receiving area of the transport vehicle with crop material from the harvester. The longitudinal position of the transport vehicle is maintained within an acceptable range by adjusting the velocity of the transport vehicle. The receiving area of the transport vehicle can be more evenly filled with crop material by adjusting the lateral position and the longitudinal position of the transport vehicle within predetermined trim distances associated with the receiving area of the transport vehicle.Type: ApplicationFiled: September 30, 2011Publication date: August 23, 2012Inventors: Guoping Wang, Christopher A. Foster, Riccardo Morselli, Olivier Vanhercke, Todd Aznavorian, Arun Natarajan, Kousha Moaveni-Nejad
-
Patent number: 8248302Abstract: A reflection-type phase shifter is provided. The reflection-type phase shifter has a coupler, a first reflection load, and a second reflection load. The coupler has an input port for receiving an input signal and an isolated port for outputting an output signal due to a first reflected signal at a through port and a second reflected signal at a coupled port. The first reflection load reflects the first fraction of the input signal to thereby generate the first reflected signal. The second reflection load reflects the second fraction of the input signal to thereby generate the second reflected signal. In addition, at least one of the first and second reflection loads is a transmission line.Type: GrantFiled: March 26, 2009Date of Patent: August 21, 2012Assignees: Mediatek Inc., International Business Machines CorporationInventors: Ming-Da Tsai, Arun Natarajan
-
Publication number: 20120105172Abstract: A phase shifter and related load device are provided. The phase shifter includes a phase shifter core and load devices. The phase shifter core has an input port for receiving an input signal, an output port for outputting an output signal, and connection ports. The load devices are coupled to the connection ports, respectively. At least one of the load devices includes first varactor units each having a first node and a second node, where first nodes of the first varactor units are coupled to a first voltage, second nodes of the first varactor units are respectively coupled to a plurality of second voltages, and the second voltages include at least two voltages different from each other. The phase shifter and related load device are capable of mitigating effects resulted from varactor's non-linear C-V curve.Type: ApplicationFiled: August 10, 2009Publication date: May 3, 2012Inventors: Ming-Da Tsai, Jing-Hong Conan Zhan, Arun Natarajan
-
Publication number: 20120048620Abstract: A method of controlling pressure in a mud pump system includes generating a pressure limiting factor output using a pressure feedback input and a motor speed input to calculate a fluid conductance estimate, maintaining the pressure limiting factor output at a maximum value based on a pressure set-point, continuously updating a normal fluid conductance value based on the fluid conductance estimate while the pressure limiting factor output remains at the maximum value, freezing the normal fluid conductance value, if the pressure limiting factor output is less than the maximum value, calculating a change in fluid conductance based on the normal fluid conductance value and the fluid conductance estimate, generating at least one adaptive gain based on the change in fluid conductance, and controlling a motor speed of a pump in the mud pump system based on the at least one adaptive gain.Type: ApplicationFiled: August 25, 2010Publication date: March 1, 2012Applicant: OMRON OILFIELD & MARINE, INC.Inventors: Fergus Hopwood, Arun Natarajan
-
Patent number: 7812775Abstract: A phased array mm-wave device includes a substrate, a mm-wave transmitter integrated onto the substrate configured to transmit a mm-wave signal and/or a mm-wave receiver integrated onto the substrate and configured to receive a mm-wave signal. The mm-wave device also includes a phased array antenna system integrated onto the substrate and including two or more antenna elements. The phased array mm-wave device also includes one or more dielectric lenses. A distributed mm-wave distributed combining tree circuit includes at least two pairs of differential transconductors with regenerative degeneration and accepts at least two differential input signals. Two mm-wave loopback methods measure the phased array antenna patterns and the performance of an integrated receiver transmitter system.Type: GrantFiled: September 22, 2006Date of Patent: October 12, 2010Assignee: California Institute of TechnologyInventors: Aydin Babakhani, Xiang Guan, Seyed Ali Hajimiri, Abbas Komijani, Arun Natarajan
-
Publication number: 20100231452Abstract: A phased array mm-wave device includes a substrate, a mm-wave transmitter integrated onto the substrate configured to transmit a mm-wave signal and/or a mm-wave receiver integrated onto the substrate and configured to receive a mm-wave signal. The mm-wave device also includes a phased array antenna system integrated onto the substrate and including two or more antenna elements. The phased array mm-wave device also includes one or more dielectric lenses. A distributed mm-wave distributed combining tree circuit includes at least two pairs of differential transconductors with regenerative degeneration and accepts at least two differential input signals. Two mm-wave loopback methods measure the phased array antenna patterns and the performance of an integrated receiver transmitter system.Type: ApplicationFiled: September 22, 2006Publication date: September 16, 2010Applicant: California Institute of TechnologyInventors: Aydin Babakhani, Xiang Guan, Seyed Ali Hajimiri, Abbas Komijani, Arun Natarajan
-
Publication number: 20090278624Abstract: A reflection-type phase shifter is provided. The reflection-type phase shifter has a coupler, a first reflection load, and a second reflection load. The coupler has an input port for receiving an input signal and an isolated port for outputting an output signal due to a first reflected signal at a through port and a second reflected signal at a coupled port. The first reflection load reflects the first fraction of the input signal to thereby generate the first reflected signal. The second reflection load reflects the second fraction of the input signal to thereby generate the second reflected signal. In addition, at least one of the first and second reflection loads is equivalent to a transmission line.Type: ApplicationFiled: March 26, 2009Publication date: November 12, 2009Inventors: Ming-Da Tsai, Arun Natarajan
-
Patent number: 7493144Abstract: A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.Type: GrantFiled: July 16, 2007Date of Patent: February 17, 2009Assignee: California Institute of TechnologyInventors: Arun Natarajan, Abbas Komijani, Seyed Ali Hajimiri
-
Publication number: 20080058019Abstract: A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.Type: ApplicationFiled: July 16, 2007Publication date: March 6, 2008Applicant: California Institute of TechnologyInventors: Arun Natarajan, Abbas Komijani, Seyed Hajimiri
-
Patent number: 7260418Abstract: A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.Type: GrantFiled: September 29, 2005Date of Patent: August 21, 2007Assignee: California Institute of TechnologyInventors: Arun Natarajan, Abbas Komijani, Seyed Ali Hajimiri
-
Publication number: 20060121869Abstract: A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.Type: ApplicationFiled: September 29, 2005Publication date: June 8, 2006Applicant: California Institute of TechnologyInventors: Arun Natarajan, Abbas Komijani, Seyed Hajimiri