Patents by Inventor Arun Prasath Chandrasekaran

Arun Prasath Chandrasekaran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230411703
    Abstract: In some aspects, the disclosure is directed to methods and systems for a flexible type-length-value (TLV) parser and identification map that may be used to quickly identify TLV sequences of packet headers for subsequent processing in a pipeline. A flexible TLV bus may provide a secondary path for the TLV header and identification map, allowing for subsequent processing stages to read, process, modify, delete, or otherwise utilize individual TLV sequences within the header.
    Type: Application
    Filed: August 2, 2023
    Publication date: December 21, 2023
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Amit Narayan Gupta, Bhaswar Mitra, Chi Ho Fredrek Choi, Arun Prasath Chandrasekaran
  • Patent number: 11758027
    Abstract: In some aspects, the disclosure is directed to methods and systems for a flexible type-length-value (TLV) parser and identification map that may be used to quickly identify TLV sequences of packet headers for subsequent processing in a pipeline. A flexible TLV bus may provide a secondary path for the TLV header and identification map, allowing for subsequent processing stages to read, process, modify, delete, or otherwise utilize individual TLV sequences within the header.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: September 12, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Amit Narayan Gupta, Bhaswar Mitra, Chi Ho Fredrek Choi, Arun Prasath Chandrasekaran
  • Publication number: 20230247116
    Abstract: In some aspects, the disclosure is directed to methods and systems for a flexible type-length-value (TLV) parser and identification map that may be used to quickly identify TLV sequences of packet headers for subsequent processing in a pipeline. A flexible TLV bus may provide a secondary path for the TLV header and identification map, allowing for subsequent processing stages to read, process, modify, delete, or otherwise utilize individual TLV sequences within the header.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 3, 2023
    Inventors: Amit Narayan Gupta, Bhaswar Mitra, Chi Ho Fredrek Choi, Arun Prasath Chandrasekaran