Patents by Inventor Arun Raman

Arun Raman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325390
    Abstract: Various embodiments may include methods executed by processors of computing devices for geometry based work execution prioritization. The processor may receive events, such as images. The processor may overlay a boundary shape on the event to identify discard regions of the event lying outside the boundary shape. The processor may identify work regions of the events lying within the working boundary shape. The devices may determine a cancellation likelihood for each of the identified work regions of the events. The processor may assign a trimming weight to each of the identified work regions based on the determined cancellation likelihoods. The processor may then add each of the identified work regions as a work item to an execution work list in an order based on the assigned trimming weights. The work items may be processed in order of trimming weight priority.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: June 18, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Tushar Kumar, Wenhao Jia, Arun Raman, Hui Chao, Wenjia Ruan
  • Patent number: 10261831
    Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing speculative loop iteration partitioning (SLIP) for heterogeneous processing devices. A computing device may receive iteration information for a first partition of iterations of a repetitive process and select a SLIP heuristic based on available SLIP information and iteration information for the first partition. The computing device may determine a split value for the first partition using the SLIP heuristic, and partition the first partition using the split value to produce a plurality of next partitions.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: April 16, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Arun Raman, Han Zhao, Aravind Natarajan
  • Patent number: 10198838
    Abstract: Various embodiments may include methods executed by processors of computing devices for geometry based work execution prioritization. The processor may receive events, such as images. The processor may overlay a boundary shape on the event to identify discard regions of the event lying outside the boundary shape. The processor may identify work regions of the events lying within the working boundary shape. The devices may determine a cancellation likelihood for each of the identified work regions of the events. The processor may assign a trimming weight to each of the identified work regions based on the determined cancellation likelihoods. The processor may then add each of the identified work regions as a work item to an execution work list in an order based on the assigned trimming weights. The work items may be processed in order of trimming weight priority.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: February 5, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Tushar Kumar, Wenhao Jia, Arun Raman, Hui Chao, Wenjia Ruan
  • Patent number: 10169105
    Abstract: Aspects include computing devices, systems, and methods for implementing scheduling and execution of lightweight kernels as simple tasks directly by a thread without setting up a task structure. A computing device may determine whether a task pointer in a task queue is a simple task pointer for the lightweight kernel. The computing device may schedule a first simple task for the lightweight kernel for execution by the thread. The computing device may retrieve, from an entry of a simple task table, a kernel pointer for the lightweight kernel. The entry in the simple task table may be associated with the simple task pointer. The computing device may directly execute the lightweight kernel as the simple task.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: January 1, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Han Zhao, Pablo Montesinos Ortego, Arun Raman, Behnam Robatmili, Gheorghe Calin Cascaval
  • Patent number: 10152243
    Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing data flow management on a computing device. Embodiment methods may include initializing a buffer partition of a first memory of a first heterogeneous processing device for an output of execution of a first iteration of a first operation by the first heterogeneous processing device on which a first iteration of a second operation assigned for execution by a second heterogeneous processing device depends. Embodiment methods may include identifying a memory management operation for transmitting the output by the first heterogeneous processing device from the buffer partition as an input to the second heterogeneous processing device. Embodiment methods may include allocating a second memory for storing data for an iteration executed by a third heterogeneous processing device to minimize a number of memory management operations for the second allocated memory.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: December 11, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Han Zhao, Arun Raman, Aravind Natarajan
  • Patent number: 10114681
    Abstract: Embodiments include computing devices, systems, and methods identifying enhanced synchronization operation outcomes. A computing device may receive a first resource access request for a first resource of a computing device including a first requester identifier from a first computing element of the computing device. The computing device may also receive a second resource access request for the first resource including a second requester identifier from a second computing element of the computing device. The computing device may grant the first computing element access to the first resource based on the first resource access request, and return a response to the second computing element including the first requester identifier as a winner computing element identifier.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: October 30, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Dario Suarez Gracia, Gheorghe Cascaval, Han Zhao, Tushar Kumar, Aravind Natarajan, Arun Raman
  • Publication number: 20180285567
    Abstract: A network and its devices may be protected from non-benign behavior, malware, and cyber attacks by configuring a computing device to repeatedly or recursively “canonicalizing” a software application program (e.g., performing compiler transformations, peeling off layers of obfuscation and junk, etc.) until the core functionality of the software application is revealed. The computing device may analyze the revealed core functionality to determine whether the software application is benign or non-benign.
    Type: Application
    Filed: May 25, 2017
    Publication date: October 4, 2018
    Inventor: Arun Raman
  • Publication number: 20180197040
    Abstract: Various embodiments may include a computing device analyzing an image to identify one or more elements of interest in the image, identifying concepts associated with elements of interest in the image, and identifying potential elements of interest and potential concepts that are not included in the image using other information. Various embodiments may include presenting the one or more elements of interest, the one or more potential elements of interest, and the one or more concepts, receiving a user input that selects one or more of the one or more elements of interest, the one or more potential elements of interest, and the one or more concepts identified in the identified elements of interest and concepts or any combination thereof for a target image, and generating the semantic representation of the target image based on the selected elements of interest and concepts.
    Type: Application
    Filed: January 9, 2017
    Publication date: July 12, 2018
    Inventors: Govindarajan Krishnamurthi, Arun Raman
  • Publication number: 20180144521
    Abstract: Various embodiments may include methods executed by processors of computing devices for geometry based work execution prioritization of irregular shapes on a computing device. Various embodiments may include calculating cost functions for an irregularly shaped work region detected by the computing device. The processor may map the irregularly shaped work region to a geometrically-bounded first work region within an N-dimensional space. The processor may then assess the efficacy of implementing modification strategies such as merging work regions or splitting a large work region into sections. Two or more smaller work regions may be merged to create a larger work region that may be more easily processed by a processing unit. Similarly, large shapes may be split into multiple smaller regularly shaped work regions that may be processed by different processors.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 24, 2018
    Inventors: Hui Chao, Tushar Kumar, Wenjia Ruan, Arun Raman
  • Publication number: 20180124080
    Abstract: Various embodiments include methods of protecting a computing device within a network from malware or other non-benign behaviors. A computing device may monitor inputs and outputs to a server, derive a functional specification from the monitored inputs and outputs, and use the functional specification for anomaly detection. Use of the derived functional specification for anomaly detection may include determining whether a behavior, activity, web application, process or software application program is non-benign. The computing device may be the server, and the functional specification may be used to determine whether the server is under attack.
    Type: Application
    Filed: March 10, 2017
    Publication date: May 3, 2018
    Inventors: Mihai Christodorescu, Nayeem Islam, Arun Raman, Shuhua Ge
  • Publication number: 20180124018
    Abstract: Aspects may relate to a server comprising: an interface to receive a service request; and a processor coupled to the interface to receive the service request, the processor configured to: implement a firewall appliance for the service request; operate a first micro-security application to generate an anomaly alert for the service request; and operate a second micro-security application to receive the anomaly alert from the first micro-security application or from another server's micro-security application and to determine whether the service request corresponds to a non-benign behavior.
    Type: Application
    Filed: December 22, 2016
    Publication date: May 3, 2018
    Inventors: Gheorghe Cascaval, Hui Chao, Mihai Christodorescu, Drew Dean, Dinakar Khurjati, Shuhua Ge, Hilmi Gunes Kayacik, Arun Raman, Ahmet Salih Buyukkayhan, Yuanwei Fang
  • Publication number: 20180074727
    Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing data flow management on a computing device. Embodiment methods may include initializing a buffer partition of a first memory of a first heterogeneous processing device for an output of execution of a first iteration of a first operation by the first heterogeneous processing device on which a first iteration of a second operation assigned for execution by a second heterogeneous processing device depends. Embodiment methods may include identifying a memory management operation for transmitting the output by the first heterogeneous processing device from the buffer partition as an input to the second heterogeneous processing device. Embodiment methods may include allocating a second memory for storing data for an iteration executed by a third heterogeneous processing device to minimize a number of memory management operations for the second allocated memory.
    Type: Application
    Filed: September 15, 2016
    Publication date: March 15, 2018
    Inventors: Han Zhao, Arun Raman, Aravind Natarajan
  • Publication number: 20180060130
    Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing speculative loop iteration partitioning (SLIP) for heterogeneous processing devices. A computing device may receive iteration information for a first partition of iterations of a repetitive process and select a SLIP heuristic based on available SLIP information and iteration information for the first partition. The computing device may determine a split value for the first partition using the SLIP heuristic, and partition the first partition using the split value to produce a plurality of next partitions.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 1, 2018
    Inventors: Arun Raman, Han Zhao, Aravind Natarajan
  • Publication number: 20180052776
    Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing shared virtual index translation on a computing device. The computing device may receive a base virtual address for storing an output of a kernel function execution to a dedicated memory and determine whether the virtual address is in a range of virtual addresses for a privatized output buffer within the dedicated memory, which may be smaller than the dedicated memory. The computing device may calculate a first modified physical address using a physical address mapped to the base virtual address and an offset of a first processing device associated with the dedicated memory in response to determining that the base virtual address is in the range of virtual addresses. The computing device may store the output of the kernel function execution to the privatized output buffer at the first modified physical address.
    Type: Application
    Filed: August 18, 2016
    Publication date: February 22, 2018
    Inventors: Han Zhao, Arun Raman, Aravind Natarajan
  • Publication number: 20170289445
    Abstract: Various embodiments may include methods executed by processors of computing devices for geometry based work execution prioritization. The processor may receive events, such as images. The processor may overlay a boundary shape on the event to identify discard regions of the event lying outside the boundary shape. The processor may identify work regions of the events lying within the working boundary shape. The devices may determine a cancellation likelihood for each of the identified work regions of the events. The processor may assign a trimming weight to each of the identified work regions based on the determined cancellation likelihoods. The processor may then add each of the identified work regions as a work item to an execution work list in an order based on the assigned trimming weights. The work items may be processed in order of trimming weight priority.
    Type: Application
    Filed: June 24, 2016
    Publication date: October 5, 2017
    Inventors: Tushar Kumar, Wenhao Jia, Arun Raman, Hui Chao, Wenjia Ruan
  • Publication number: 20170286182
    Abstract: Embodiments include computing devices, systems, and methods identifying enhanced synchronization operation outcomes. A computing device may receive a first resource access request for a first resource of a computing device including a first requester identifier from a first computing element of the computing device. The computing device may also receive a second resource access request for the first resource including a second requester identifier from a second computing element of the computing device. The computing device may grant the first computing element access to the first resource based on the first resource access request, and return a response to the second computing element including the first requester identifier as a winner computing element identifier.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 5, 2017
    Inventors: Dario Suarez Gracia, Gheorghe Cascaval, Han Zhao, Tushar Kumar, Aravind Natarajan, Arun Raman
  • Publication number: 20170287185
    Abstract: Various embodiments may include methods executed by processors of computing devices for geometry based work execution prioritization. The processor may receive events, such as images. The processor may overlay a boundary shape on the event to identify discard regions of the event lying outside the boundary shape. The processor may identify work regions of the events lying within the working boundary shape. The devices may determine a cancellation likelihood for each of the identified work regions of the events. The processor may assign a trimming weight to each of the identified work regions based on the determined cancellation likelihoods. The processor may then add each of the identified work regions as a work item to an execution work list in an order based on the assigned trimming weights. The work items may be processed in order of trimming weight priority.
    Type: Application
    Filed: June 24, 2016
    Publication date: October 5, 2017
    Inventors: Tushar Kumar, Wenhao Jia, Arun Raman, Hui Chao, Wenjia Ruan
  • Patent number: 9778961
    Abstract: Methods, devices, systems, and non-transitory process-readable storage media for a multi-processor computing device to schedule multi-versioned tasks on a plurality of processing units. An embodiment method may include processor-executable operations for enqueuing a specialized version of a multi-versioned task in a task queue for each of the plurality of processing units, wherein each specialized version is configured to be executed by a different processing unit of the plurality of processing units, providing ownership over the multi-versioned task to a first processing unit when the first processing unit is available to immediately execute a corresponding specialized version of the multi-versioned task, and discarding other specialized versions of the multi-versioned task in response to providing ownership over the multi-versioned task to the first processing unit. Various operations of the method may be performed via a runtime functionality.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: October 3, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Arun Raman
  • Patent number: 9778951
    Abstract: Embodiments include computing devices, systems, and methods for task signaling on a computing device. Execution of a task by an initial thread on a critical path of execution may be interrupted to create at least one parallel task by the initial thread that can be executed in parallel with the task executed by the initial thread. An initial signal indicating the creation of the at least one parallel task to a relay thread may be sent by the initial thread. Execution of the task by the initial thread may resume before an acquisition of the at least one parallel task.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: October 3, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Arun Raman, Pablo Montesinos Ortego
  • Patent number: 9710315
    Abstract: A computing device may be configured to generate and execute a task that includes one or more blocking constructs that each encapsulate a blocking activity and a notification handler corresponding to each blocking activity. The computing device may launch the task, execute one or more of the blocking constructs, register the corresponding notification handler for the blocking activity that will be executed next with the runtime system, perform the blocking activity encapsulated by the blocking construct to request information from an external resource, cause the task to enter a blocked state while it waits for a response from the external resource, receive an unblocking notification from an external entity, and invoke the registered notification handler to cause the task to exit the blocked state and/or perform clean up operations to exit/terminate the task gracefully.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: July 18, 2017
    Inventors: Tushar Kumar, Pablo Montesinos Ortego, Arun Raman