Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., physical computer readable storage media) to quantify effectiveness of clock gating implementations in electronic design automation are disclosed. Example methods disclosed herein include executing a first iteration of an electronic design automation (EDA) tool with clock gating of an input circuit design enabled to determine a gated power metric for a clock path of the input circuit design, executing a second iteration of the EDA tool with clock gating of the input circuit design disabled to determine an ungated power metric for the clock path of the input circuit design, and outputting a first efficiency metric for the clock path of the input circuit design based on the gated power metric and the ungated power metric.

Abstract: Provided is a power estimation tool for estimating power from an RTL simulation waveform. The tool may use an inference engine that uses an ML trained power estimation model.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for throttling data probabilistically. One of the methods includes receiving, from a client device for a particular entity, a request to process data, determining a size of data to be processed, providing, to a throttler system, a bandwidth assignment request indicating the particular entity and the size of data to be processed, receiving, from the throttler system, a bandwidth assignment for the particular entity to use when serving the request, and probabilistically determining whether to currently serve the request based on the bandwidth assignment, the size of the data to be processed, and an accrued quantity of tokens for the particular entity.

Abstract: Provided herein are schemes for reducing leakage in dynamic circuits during sleep modes.

Abstract: Provided herein are schemes for reducing leakage in dynamic circuits during sleep modes.