Abstract: A gas inlet tube assembly is presented. The assembly comprising a first inlet configured to insert a first process gas and a second inlet configured to insert a second process gas; a gas inlet tube configured to mix the first process gas from the first inlet and the second process gas from the second inlet, the gas inlet tube being in fluid communication with a reaction chamber of the substrate processing apparatus, comprising upper and lower segments, wherein the first inlet and the second inlet are placed in the upper segment of the gas inlet tube and face with each other directly opposite, the upper segment is converging cone shape, the lower segment is diverging cone shape, the ratio of the length of the upper segment bottom to the length of the lower segment bottom can be 0.1˜0.9, preferably 0.15˜0.25.

Abstract: Apparatus, particularly reaction chamber for processing semiconductor substrate is presented. A reaction chamber with gas exit flow control capability comprises an upper body, a substrate supporting part, a shower head for letting in gas which is used for processing the substrate, a lower body comprising duct, wherein the duct has a multiple of duct holes and a flow control liner configured to surround the duct and the flow control liner has a multiple of flow holes, wherein the duct holes and flow holes are used to control the exit flow of the gas used for substrate processing, and the flow control liner may rotate around so that the duct holes and the flow holes can be overlapped. The duct can have scribe mark for various hole sizes and shapes.

Abstract: Exemplary deposition methods may include forming a plasma of an oxygen-containing precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include, while maintaining the plasma of the oxygen-containing precursor, flowing a silicon-containing precursor through a faceplate into the processing region of the semiconductor processing chamber. The faceplate may have an impedance of at least 5.75 deciohm. The methods may include depositing a silicon-containing material on the semiconductor substrate.

Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and the substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The faceplate may be characterized by a central axis. The faceplate may define a plurality of apertures through the faceplate distributed in a number of rings. Each ring of apertures may include a scaled increase in aperture number from a ring radially inward. A radially outermost ring of apertures may be characterized by a number of apertures reduced from the scaled increase in aperture number.