Patents by Inventor Arun Visvanath

Arun Visvanath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371469
    Abstract: This disclosure describes methods, non-transitory computer readable media, and systems that can utilize a machine learning model to recalibrate genotype calls (e.g., variant calls) of existing sequencing data files. For instance, the disclosed systems the disclosed systems can access one or more existing sequencing data files for a genomic sample, where the files include nucleotide-read data and genotype calls at particular genomic coordinate. From the one or more existing sequencing data files, the disclosed system extracts sequencing metrics for nucleotide reads or a particular genotype call at a particular genomic coordinate. By processing the extracted sequencing metrics, the systems further utilize a call-recalibration-machine-learning model to generate variant-call classifications indicating an accuracy of the particular genotype call.
    Type: Application
    Filed: May 3, 2024
    Publication date: November 7, 2024
    Inventors: Rami Mehio, Gavin Derek Parnaby, Arun Visvanath, Zhuoyi Huang, Jacobus De Beer
  • Publication number: 20230420074
    Abstract: Systems, methods, and apparatus are described herein for identifying callable regions and performing variant calling while operating within allocated memory. A sequencing subsystem may comprise a variant caller or variant caller subsystem. The variant caller may include a calling subsystem configured to identify callable regions and may send the callable regions to a downstream genotyping subsystem of the variant caller. The calling subsystem of the variant caller may be configured to detect a callable region of the sequencing data when a depth of the plurality of reads is above a callable region depth threshold. The calling subsystem of the variant caller may monitor memory used by the callable region and, when the memory used exceeds a memory threshold of a total amount of memory allocated, the calling subsystem may split or spill at least a portion of the callable region to operate within the total amount of allocated memory.
    Type: Application
    Filed: June 23, 2023
    Publication date: December 28, 2023
    Applicants: ILLUMINA SOFTWARE, INC., Illumina Cambridge Limited
    Inventors: Adam Michael Birnbaum, Fabian Jobst Klötzl, Arun Visvanath
  • Publication number: 20230021577
    Abstract: This disclosure describes methods, non-transitory computer readable media, and systems that can utilize a machine learning model to recalibrate nucleotide-base calls (e.g., variant calls) of a call-generation model. For instance, the disclosed systems can train and utilize a call-recalibration-machine-learning model to generate a set of predicted variant-call classifications based on sequencing metrics associated with a sample nucleotide sequence. Leveraging the set of variant-call classifications, the disclosed systems can further update or modify nucleotide-base calls (e.g., variant calls) corresponding to genomic coordinates.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Inventors: Gavin Derek Parnaby, Arun Visvanath, Antoine Jean Dejong
  • Publication number: 20210183468
    Abstract: Systems, methods, and computer programs for analyzing genetic sequence data is disclosed. In one aspect, the system can include one or more of a first integrated circuit, with each first integrated circuit forming a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of a sequence analysis pipeline. Additionally, the system can include one or more second integrated circuits, with each second integrated circuit forming a field programmable gate array (FPGA). The FPGA can be configured by firmware to arrange a set of hardwired digital logic circuits to perform a second set of genomic processing stages of the sequence analysis pipeline, the set of hardwired digital logic circuits of each FPGA being arranged as a set of processing engines to perform the second set of genomic processing stages.
    Type: Application
    Filed: February 2, 2021
    Publication date: June 17, 2021
    Inventors: Mark David Hahm, Jacobus de Beer, Varun Jain, Rami Mehio, Eric Ojard, Michael Ruehle, Amnon Ptashek, Severine Catreux, Arun Visvanath
  • Publication number: 20180121601
    Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.
    Type: Application
    Filed: October 27, 2017
    Publication date: May 3, 2018
    Inventors: Mark David Hahm, Jacobus de Beer, Varun Jain, Rami Mehio, Eric Ojard, Michael Ruehle, Amnon Ptashek, Severine Catreux, Arun Visvanath
  • Publication number: 20130150013
    Abstract: Systems and methods are presented to support operation of a multiple subscriber identity module (SIM) device. A timing conflict may exist when a scheduled high priority communication of a first SIM overlaps with a scheduled paging monitoring activity for a second SIM. The multiple SIM device may preempt transitioning communication resources to the second SIM when the first SIM executes high priority communications. Or, the multiple SIM device may execute a rescheduling action to resolve the timing conflict. The high priority communication of the first SIM may be rescheduled. Alternatively, normal priority paging monitoring actions may be rescheduled to resolve the timing conflict.
    Type: Application
    Filed: July 11, 2012
    Publication date: June 13, 2013
    Applicant: Broadcom Corporation
    Inventors: Yuan Liu, Jun Lin, Yaxin Cao, Sethuraman Gurumoorthy, Tong Chen, Rami Mehio, Jin-Sheng Su, Arun Visvanath
  • Publication number: 20080095141
    Abstract: A system for processing radio frequency (RF) signals includes a searcher and a plurality of Cluster Path Processor (CPPs). During CPP setup operations, a controlling process (or CPP) receives a timing reference signal corresponding to the information signal and establishing a sampling position of the CPP such that a selected tap of a plurality of taps of the CPP corresponds to the timing reference signal. During first CPP alignment adjustment operations, the controlling process or CPP determines early and late information signal correlation values using the plurality of taps of the CPP, the plurality of taps of the CPP with a first sampling spread and, based upon the early and late signal correlation values, adjusts the sampling position of the CPP.
    Type: Application
    Filed: December 4, 2007
    Publication date: April 24, 2008
    Applicant: BROADCOM CORPORATION
    Inventors: Hongwei Kong, Li Chang, Arun Visvanath