Abstract: Several systems and methods for data processing are disclosed. In an embodiment, a data processing system includes a host processor, a plurality of slave processors and a plurality of frame buffers. Each slave processor is associated with at least one data co-processor configured to process data sub-frames based on one processing stage. For a first data sub-frame, a first messaging call is provisioned to the host processor by each slave processor subsequent to execution of a processing stage by an associated data co-processor. The host processor is configured to provision a second messaging call to a next slave processor upon receiving the first messaging call. Further, for each subsequent data sub-frame, a third messaging call is provisioned by each slave processor to a next slave processor subsequent to execution of the corresponding processing stage by the associated data co-processor for facilitating execution of the next processing stage.

Abstract: Several systems and methods for data processing are disclosed. In an embodiment, a data processing system includes a host processor, a plurality of slave processors and a plurality of frame buffers. Each slave processor is associated with at least one data co-processor configured to process data sub-frames based on one processing stage. For a first data sub-frame, a first messaging call is provisioned to the host processor by each slave processor subsequent to execution of a processing stage by an associated data co-processor. The host processor is configured to provision a second messaging call to a next slave processor upon receiving the first messaging call. Further, for each subsequent data sub-frame, a third messaging call is provisioned by each slave processor to a next slave processor subsequent to execution of the corresponding processing stage by the associated data co-processor for facilitating execution of the next processing stage.

Abstract: A computer implemented method of rasterizing a page in a page description language efficiently utilizes the resources of a multiprocessor integrated circuit by spawning of subtasks from a RISC type processor to one or more DSP type processors. The RISC type processor interprets the page in the page description language and detects a Y coordinate of edge intersection using the floating point calculation unit. The DSP type processors sort polygon edges in increasing Y coordinate and detect a Y coordinate of edge intersections via successive midpoint approximation using an integer multiplier unit.

Abstract: A method of performing a pattern fill operation of a pattern into a clipping region resolves the pattern into an intermediate format between a page description language and a page bit map. This intermediate format is cached. For each tiling of the pattern into the clipping region the pattern is clipped to the clipping region and rendered from the clipped intermediate format pattern into a corresponding location of a page bit map. The intermediate format of the pattern may be scan line runs and trapezoid fills. The intermediate format of the pattern may be paths and curves. The clipping of the pattern to the clipping region performs scan line conversion with polygon to polygon clipping or trapezoid/run array to trapezoid/run array clipping.

Abstract: A computer implemented method of clipping to a clip polygon and trapezoid formation employs an edge array rather than a set linked list from an array of pointers equal in number to the number of scan lines. This eliminates storage of linked list pointers which in the prior art included many null pointers resulting in better memory utilization. This method sorts the active edge table only at edge intersections and vertices, thus eliminating much unneeded sorting. This method permits integrated clipping of a subject polygon by a clip polygon and forming trapezoids filling the clipped area by activating trapezoid formation at every vertex of either polygon and at every edge intersection.

Abstract: This invention cures many inefficiencies with known scan conversion methods. This invention employs a edge array rather than a set linked list from an array of pointers equal in number to the number of scan lines. This invention thus eliminates storage of linked list pointers which in the prior art included many null pointers resulting in better memory utilization. es on-chip memory when employing a single chip microprocessor. This invention sorts the active edge table only at edge intersections and vertices, thus eliminating much unneeded sorting. This invention permits integrated clipping of a subject polygon by a clip polygon and forming trapezoids filling the clipped area by activating trapezoid formation at every vertex of either polygon and at every edge intersection. This process saves code space and computer processing time. This invention efficiently utilizes the resources of a multiprocessor integrated circuit by spawning of subtasks from a RISC type processor to one or more DSP type processors.

Abstract: A method of performing a pattern fill operation of a pattern into a clipping region resolves the pattern into an intermediate format between a page description language and a page bit map. This intermediate format is cached. For each tiling of the pattern into the clipping region the pattern is clipped to the clipping region and rendered from the clipped intermediate format pattern into a corresponding location of a page bit map. The intermediate format of the pattern may be scan line runs and trapezoid fills. The intermediate format of the pattern may be paths and curves. The clipping of the pattern to the clipping region performs scan line conversion with polygon to polygon clipping or trapezoid/run array to trapezoid/run array clipping.

Abstract: This invention cures many inefficiencies with known scan conversion methods. This invention employs an edge array rather than a set linked list from an array of pointers equal in number to the number of scan lines. This invention thus eliminates storage of linked list pointers which in the prior art included many null pointers resulting in better memory utilization. This invention sorts the active edge table only at edge intersections and vertices, thus eliminating much unneeded sorting. This invention permits integrated clipping of a subject polygon by a clip polygon and forming trapezoids filling the clipped area by activating trapezoid formation at every vertex of either polygon and at every edge intersection. This process saves code space and computer processing time. This invention efficiently utilizes the resources of a multiprocessor integrated circuit by spawning of subtasks from a RISC type processor to one or more DSP type processors.

Abstract: A stack (successive) of non-blocking streams may be used to transfer data from a data source to a user application. For example, one stream may transfer data from a device driver to a random access memory (RAM) and another stream may transfer the data in the RAM to an on-chip memory. By using non-blocking streams, the processing power available in an embedded system may be utilized efficiently. Another aspect of the present invention provides the user applications the ability to control the logic for allocation and release of memory space supporting buffers used in data transfers.

Abstract: This invention cures many inefficiencies with known scan conversion methods. This invention employs a edge array rather than a set linked list from an array of pointers equal in number to the number of scan lines. This invention thus eliminates storage of linked list pointers which in the prior art included many null pointers resulting in better memory utilization. es on-chip memory when employing a single chip microprocessor. This invention sorts the active edge table only at edge intersections and vertices, thus eliminating much unneeded sorting. This invention permits integrated clipping of a subject polygon by a clip polygon and forming trapezoids filling the clipped area by activating trapezoid formation at every vertex of either polygon and at every edge intersection. This process saves code space and computer processing time. This invention efficiently utilizes the resources of a multiprocessor integrated circuit by spawning of subtasks from a RISC type processor to one or more DSP type processors.

Abstract: A method of processing print data allowing for rendering bands of print data in parallel. A main processor (52) of a single-chip multiprocessor converts an incoming page of print data into paths. The paths are then converted to primitives and the primitives are rasterized using parallel processor (60, 62, 64, 66). The parallel processors (60, 62, 64, 66) work in concert with the main processor (52) such that bands of the final print image are rendered into a frame buffer (58) in parallel, allowing for faster and more efficient processing of print data.

Abstract: This invention cures many inefficiencies with known scan conversion methods. This invention employs a edge array rather than a set linked list from an array of pointers equal in number to the number of scan lines. This invention thus eliminates storage of linked list pointers which in the prior art included many null pointers resulting in better memory utilization. es on-chip memory when employing a single chip microprocessor. This invention sorts the active edge table only at edge intersections and vertices, thus eliminating much unneeded sorting. This invention permits integrated clipping of a subject polygon by a clip polygon and forming trapezoids filling the clipped area by activating trapezoid formation at every vertex of either polygon and at every edge intersection. This process saves code space and computer processing time. This invention efficiently utilizes the resources of a multiprocessor integrated circuit by spawning of subtasks from a RISC type processor to one or more DSP type processors.