Abstract: Embodiments herein relate to a universal component interconnect express (UCIe) link that includes a mainband and a sideband. One or more pieces of logic may identify a data that is to be transmitted on the sideband. The logic may then identify, based on factors such as a characteristic of the data or a characteristic of the link, whether to transmit the data on the mainband. Other embodiments may be described and/or claimed.

Abstract: Embodiments herein relate to a logic configured to: identify, based on a header of a first packet, that the first packet is related to a first debug process of a component to which the logic is communicatively coupled, wherein the first debug process is performed by a first DTS; identify, based on a header of a second packet, that the second packet is related to a second debug process of the component, wherein the second debug process is performed by a second DTS; route, based on the identification that the first packet is related to the first debug process, the first packet between the component and the DTS; and route, based on the identification that the second packet is related to the second debug process, the second packet between the component and the DTS. Other embodiments may be described and/or claimed.

Abstract: In an embodiment, a host system for selecting a power supply includes a processor, a bus interface to connect to a peripheral device, and a power controller. The power controller may be to: determine whether the processor has entered a reduced power mode; determine, via one or more bus messages, whether charging is to be performed for a battery of the peripheral device; and in response to a determination that the processor has entered the reduced power mode and that charging is not to be performed for the battery of the peripheral device, switch from a first power supply to a second power supply as an active power source of the host system. Other embodiments are described and claimed.

Abstract: Methods and apparatus relating to techniques for extending I3C capability across multiple platforms and devices over a Universal Serial Bus (USB) type C (USB-C) connection are described. In one embodiment, a first device is coupled to a second device via a first interface and a second interface. The first interface is to communicate low-speed messages and data between the first device and the second device and the second interface is to communicate high-speed data between the first device and the second device. The first device comprises an extension controller to communicatively couple one or more target devices of the first device to one or more target devices of the second device via the first interface. Other embodiments are also claimed and disclosed.

Abstract: Techniques for interfacing with a universal serial bus (USB) camera by a controller hub are disclosed. In one embodiment, a controller hub includes a USB multiplexer, allowing the USB camera connected to the multiplexer to be controlled by a component of the controller hub or by a host controller of a host system. In another embodiment, a USB camera is connected to a controller hub, and the controller hub includes USB video class (UVC) function circuitry to send images from the USB camera to a host controller of a host system. The images can also be processed by a component of the controller hub.

Abstract: In an embodiment, an input-output (IO) device may include an IO controller and a debug controller. The IO controller may process IO data packets. The debug controller may be to: receive a first debug packet from a host system via an in-band connection, process the first debug packet to extract a command generated by the host system, and execute the extracted command to debug the IO device. Other embodiments are described and claimed.

Abstract: Embodiments provide apparatuses, systems, and methods related to an electronic device that includes first one or more ports to transmit data from the electronic device, and one or more buffers to buffer the data prior to transmission of the data on the ports. The electronic device may further includes a bandwidth management module to: identify a bandwidth required to transmit an amount of the data on the first one or more ports; identify bandwidth-related parameters of the first one or more ports; and identify, based on the bandwidth-related parameters and the bandwidth required to transmit the amount of the data, buffer allocation of the data. The electronic device may further include a buffer management module coupled with the bandwidth management module, the buffer management module to allocate the data to the one or more buffers based on the buffer allocation. Other embodiments may be described and claimed.

Abstract: In one embodiment, an apparatus includes a unified adapter layer and a first bus controller. The unified adapter layer is to receive a first host data packet packetized in accordance with a host protocol and directed to a first device and decode the first host data packet to generate first and second data elements based on the first host data packet, the first device associated with a first device protocol. The first bus controller is coupled to the unified adapter layer and is to be coupled to the first device via a first bus. The first bus controller is to packetize the first data element in accordance with the first device protocol to generate a first device data packet for transmission to the first device in accordance with the first device protocol via the first bus and adjust a bus controller parameter based in part on the second data element. Other embodiments are described and claimed.