Abstract: An apparatus for detecting an anomaly in an electronic system embodying at least two integrated circuits, and where necessary, removing/mitigating the anomaly. The anomaly detection is based on sensing the characteristics of either the current, the voltage, or both the current and voltage of the supply rail connected to the at least two integrated circuits. When an anomaly occurs, the anomaly is detected by one sensing circuit sensing that the characteristics are different from that when the electronic system is functioning normally.

Abstract: A device that includes one or more charging circuits is disclosed. Each charging circuit includes an input for connecting to an energy source, an output for connecting to an energy storage device, a signal generator and a switching circuit. The signal generator is configured to generate a control signal that includes enabling and disabling signal portions having a duty cycle that is based on an output voltage at the output. The switching circuit is configured to alternately couple the output to the input and a ground during the enabling signal portions of the control signal, and to isolate the output from the input and the ground during the disabling signal portions of the control signal. A method of charging an energy storage device is also disclosed.

Abstract: A circuit for mitigating single-effect-transients (SETs) comprising: a first sub-circuit comprising a first p-type transistor arrangement configured to generate a first output and a first n-type transistor arrangement configured to generate a second output; and a second sub-circuit comprising a connecting p-type transistor arrangement and a connecting n-type transistor arrangement connected in series, wherein the first output and the second output are electrically coupled to each other through the second sub-circuit.

Abstract: A control circuitry of a switched-mode power module, the switched-mode power module comprising a power stage configured to receive input power from a power supply and to output power to a load, the output power having an output voltage, the control circuitry configured to enable the power stage to output power when the output voltage is lower than a reference voltage by one of: a predetermined amount and an adaptive amount, the control circuitry further configured to disable the power stage from providing the output power when the output voltage exceeds the reference voltage by one of: a predetermined amount and an adaptive amount.

Abstract: A semiconductor component with a drift region and a drift control region. One embodiment includes a semiconductor body having a drift region of a first conduction type in the semiconductor body. A drift control region composed of a semiconductor material, which is arranged, at least in sections, is adjacent to the drift region in the semiconductor body. An accumulation dielectric is arranged between the drift region and the drift control region.

Abstract: A semiconductor component with a drift region and a drift control region. One embodiment includes a semiconductor body having a drift region of a first conduction type in the semiconductor body. A drift control region composed of a semiconductor material, which is arranged, at least in sections, is adjacent to the drift region in the semiconductor body. An accumulation dielectric is arranged between the drift region and the drift control region.

Abstract: A semiconductor component with a drift region and a drift control region. One embodiment includes a semiconductor body having a drift region of a first conduction type in the semiconductor body. A drift control region composed of a semiconductor material, which is arranged, at least in sections, is adjacent to the drift region in the semiconductor body. An accumulation dielectric is arranged between the drift region and the drift control region.

Abstract: A semiconductor component with a drift region and a drift control region. One embodiment includes a semiconductor body having a drift region of a first conduction type in the semiconductor body. A drift control region composed of a semiconductor material, which is arranged, at least in sections, is adjacent to the drift region in the semiconductor body. An accumulation dielectric is arranged between the drift region and the drift control region.