Abstract: Control signals for switching the bandwidth of a filter in a phase locked loop are provided by comparator circuits having time delays at their inputs that vary as a function of the magnitude of changes in the outputs from a phase comparator. These variable time delays permit the comparator circuits to produce an output having a duration of the proper length in order to permit the filter to have a large bandwidth for a long enough time to permit the phase locked loop to become locked.

Abstract: A voltage controlled oscillator for use in a phase locked loop is provided with a first varactor circuit that responds to a control signal to set the center frequency of the oscillator, and with a second varactor circuit comprising a modulation varactor that responds to a modulation signal to cause the oscillator to produce a modulated output. The modulation sensitivity of the oscillator is made relatively constant between upper and lower center frequencies by applying a portion of the modulation signal to the first varactor circuit in addition to the control signal.

Abstract: A combining and filter circuit is provided to connect the acquisition circuit and phase detector circuit to the voltage controlled oscillator in a phase locked loop. The combining and filter circuit includes twin-T filters for removing reference frequency signals. An output circuit includes series resistors and capacitors, and reverse poled Schottky diodes which provide rapidly changing acquisition signals that are relatively noise free.

Abstract: The relative frequency of two signals is indicated by applying pulses indicative of the two signals to respective bistable flip-flops. The flip-flops are interconnected to produce two binary outputs each of which varies between two binary values in response to occurrence of the pulses. These binary outputs are applied to a logic circuit which produces a binary output that varies between two binary values as a function of the similarity and difference in binary values of the two flip-flop signals. The binary output of the logic circuit is applied to two further bistable flip-flops along with the pulses to control the outputs of the further flip-flops. The outputs of the further flip-flops produce respective signals which indicate the relative frequency of the two signals, and which can be used to change this relative frequency.