Patents by Inventor Arvin Nono VERDEFLOR

Arvin Nono VERDEFLOR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • EMBEDDED LID FOR LOW COST AND IMPROVED THERMAL PERFORMANCE
    Publication number: 20220319950
    Abstract: An electronic device includes a multilevel package substrate, a die, a lid, and a package structure that encloses the die, a portion of the lid, and a portion of the multilevel package substrate, where the package structure fills a gap between a side of another portion of the lid and a side of the die. A method includes attaching a die to a multilevel package substrate with a first side of the die facing the multilevel package substrate and a second side facing away from the multilevel package substrate; positioning a lid on the multilevel package substrate with a first portion of the lid spaced apart from the second side of the die; and forming a package structure that encloses the die and a portion of the multilevel package substrate and fills a gap between the first portion of the lid and the second side of the die.
    Type: Application
    Filed: October 26, 2021
    Publication date: October 6, 2022
    Applicant: Texas Instruments Incorporated
    Inventors: Hiep Xuan Nguyen, Jaimal Mallory Wiliamson, Arvin Nono Verdeflor, Snehamay Sinha
  • Integrated circuit packaging
    Patent number: 11227852
    Abstract: An integrated circuit and methods for packaging the integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first integrated circuit die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first integrated circuit die and the palladium coated copper wires. The first integrated circuit die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: January 18, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Honglin Guo, Jason Chien, Byron Lovell Williams, Jeffrey Alan West, Anderson Li, Arvin Nono Verdeflor
  • INTEGRATED CIRCUIT PACKAGING
    Publication number: 20200251440
    Abstract: An integrated circuit and methods for packaging the integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first integrated circuit die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first integrated circuit die and the palladium coated copper wires. The first integrated circuit die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Inventors: Honglin GUO, Jason CHIEN, Byron Lovell WILLIAMS, Jeffrey Alan WEST, Anderson LI, Arvin Nono VERDEFLOR
  • Integrated circuit packaging
    Patent number: 10629562
    Abstract: An integrated circuit package and methods for packaging an integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first die and the palladium coated copper wires. The first die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: April 21, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Honglin Guo, Jason Chien, Byron Lovell Williams, Jeffrey Alan West, Anderson Li, Arvin Nono Verdeflor
  • INTEGRATED CIRCUIT PACKAGING
    Publication number: 20190206828
    Abstract: An integrated circuit package and methods for packaging an integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first die and the palladium coated copper wires. The first die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.
    Type: Application
    Filed: July 2, 2018
    Publication date: July 4, 2019
    Inventors: Honglin GUO, Jason CHIEN, Byron Lovell WILLIAMS, Jeffrey Alan WEST, Anderson LI, Arvin Nono VERDEFLOR