Abstract: An Analog-to-Digital Converter (ADC) device includes an input interface and conversion circuitry. The input interface is configured to receive an analog input signal. The conversion circuitry is configured to convert the analog input signal into a digital word by performing a sequence of iterations to determine respective bits of the digital word, wherein the sequence (i) progresses in descending order of bit significance of the bits, from a Most Significant Bit (MSB) to a Least Significant Bit (LSB), and (ii) repeats evaluation of a predefined number of Least-Significant Bits (LSBs) of the digital word multiple times, and determining a final value of the digital word by averaging the repeatedly-evaluated LSBs.

Abstract: Systems and techniques relating to a digital-to-analog converter (DAC) are described. A described DAC cell includes a differential switch pair coupled with a cross-coupled switch pair. Gate terminals of the differential switch pair are arranged to respectively receive an input signal to the cell and an inverted version of the input signal to respectively drive the gate terminals of the differential switch pair. Gate terminals of the cross-coupled switch pair are arranged to respectively receive the input signal and the inverted version of the input signal to respectively drive the gate terminals of the cross-coupled switch pair. The cross-coupled switch pair is configured to reduce or eliminate net differential transient current between switch output terminals of the differential switch pair. A current-to-voltage converter coupled with the switch output terminals of the differential switch pair generates a voltage that forms at least a portion of an output of the digital-to-analog converter.

Abstract: In aspects of a low phase noise technique for use with a crystal oscillator, a bias control circuit sets a bias voltage on the gate of a first transistor needed to sink or source an amount of current corresponding to a sensed common mode signal. The sensed common mode signal is sensed with a common mode sense circuit that is coupled across two ports of the crystal oscillator, and current is provided by a current source. The bias voltage is set by a bias controller that uses a second transistor coupled to the common mode sense circuit and the first transistor.

Abstract: In aspects of a low phase noise technique for use with a crystal oscillator, a bias control circuit sets a bias voltage on the gate of a first transistor needed to sink or source an amount of current corresponding to a sensed common mode signal. The sensed common mode signal is sensed with a common mode sense circuit that is coupled across two ports of the crystal oscillator, and current is provided by a current source. The bias voltage is set by a bias controller that uses a second transistor coupled to the common mode sense circuit and the first transistor.