Patents by Inventor Arvind Raghavan
Arvind Raghavan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250105732Abstract: An apparatus includes a power converter with an input terminal and an output terminal. The apparatus further includes a first comparator. A first input of the first comparator is coupled to the output terminal of the power converter. The apparatus further includes a reference clock generator. An output of the reference clock generator is coupled to a second input of the first comparator. An input of the reference clock generator is coupled to a frequency comparator.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Inventors: Keng Chen, Arvind Raghavan, Tamir Salus, Christopher Schaef, Huanhuan Zhang, Sivaraman Masilamani
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Publication number: 20250007395Abstract: A switched capacitor voltage regulator (SCVR) design, such as a continuous capacitive voltage regulator (C2VR) design, may use capacitors and switches to provide improved cost and space efficiencies. A remote sensing circuit may be used to improve C2VR performance. By adding a remote sensing circuit to the regulation feedback loop within the C2VR circuit design, the C2VR circuit may provide improved accuracy in voltage regulation, such as by providing a correction based on the voltage error between the remote-sensed voltage and the reference target. The remote sensing circuit may also provide transient information for under-voltage detection at an output terminal. This detected transient may become an alternating current (AC) portion of the under-voltage detection threshold, which improves the ability of the C2VR circuit to provide early detection for any under-voltage fault.Type: ApplicationFiled: June 30, 2023Publication date: January 2, 2025Inventors: Keng Chen, Arvind Raghavan, Rachid Rayess, Tamir Salus, Christopher Schaef, Huanhuan Zhang, Sivaraman Masilamani, Gayathri Devi Sridharan, Subhrashankha Ghosh
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Publication number: 20240429815Abstract: Some embodiments include a voltage regulator including a clock node to receive an input clock signal, and first and second power switching blocks coupled to the clock node. The first power switching block includes a first clock generator and first switched capacitor circuitry. The first clock generator includes clock output nodes to provide first clock signals based on the input clock signal. The first switched capacitor circuitry includes input nodes to receive first control signals generated based on the first clock signals. The second power switching block includes a second clock generator and second switched capacitor circuitry. The second clock generator includes clock output nodes to provide second clock signals based on the input clock signal. The second switched capacitor circuitry includes input nodes to receive second control signals generated based on the second clock signals.Type: ApplicationFiled: June 26, 2023Publication date: December 26, 2024Inventors: Huanhuan Zhang, Keng CHEN, Arvind Raghavan, Christopher Schaef, Tamir Salus, Sivaraman Masilamani
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Patent number: 12166414Abstract: Techniques and mechanisms for determining a mode of operation of a switched capacitor voltage regulator (SCVR). In an embodiment, a controller supports multiple modes of operation of the SCVR, wherein the modes each correspond to a different respective sequence of switch states of a converter core of the SCVR. One of the modes is to provide boost voltage regulation with the SCVR. The controller transitions seamlessly and autonomously between two modes based on respective reference switch states of the two modes. In another embodiment, a mode transition is performed based on a signal which a control sensor generates based on a rate of switch events of the voltage regulator, and predetermined reference information indicating current characteristics of the voltage regulator.Type: GrantFiled: April 1, 2022Date of Patent: December 10, 2024Assignee: Intel CorporationInventors: Tamir Salus, Nicolas Butzen, Arvind Raghavan, Harish Krishnamurthy
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Publication number: 20240297586Abstract: Embodiments described herein may include apparatus, systems, techniques, and/or processes that are directed to multiphase power converters and how current level outputs of each phase circuit are calibrated. The multiple phase circuits are grouped into multiple subsets, wherein one phase circuit of each subset is designated as a reference phase circuit. The reference phase circuits of each subset are calibrated together, using, for example, a closed loop daisy chain technique where each reference phase circuit calibrates their current output to the current output of the previous phase circuit, or alternatively, a current averaging technique where each reference phase circuit balances their current output to the average output of the reference phase circuits.Type: ApplicationFiled: March 2, 2023Publication date: September 5, 2024Inventors: Keng Chen, Shunjiang Xu, Christopher Schaef, Tamir Salus, Kishan Joshi, Arvind Raghavan, Huanhuan Zhang
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Publication number: 20240154526Abstract: A device comprises a first comparator to generate a first clock signal based on a reference voltage and a first voltage at an output of a switched-capacitor power converter (SCPC), and a second comparator to generate a first control signal based on the first voltage and a threshold voltage. A sensor is to generate a second control signal based on one of a level of a current of the first clock signal, or a duty cycle of the first clock signal. A frequency divider circuit is to generate a second clock signal based on the first control signal and the second control signal, and in some embodiments, further based on one of the first clock signal or a third clock signal. Controller circuitry is to operate switch circuitry of the SCPC based on the first clock signal.Type: ApplicationFiled: November 9, 2022Publication date: May 9, 2024Applicant: Intel CorporationInventors: Keng Chen, Huanhuan Zhang, Arvind Raghavan, Tamir Salus, Christopher Schaef, Gayathri Devi Sridharan
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Publication number: 20230318448Abstract: Techniques and mechanisms for determining a mode of operation of a switched capacitor voltage regulator (SCVR). In an embodiment, a controller supports multiple modes of operation of the SCVR, wherein the modes each correspond to a different respective sequence of switch states of a converter core of the SCVR. One of the modes is to provide boost voltage regulation with the SCVR. The controller transitions seamlessly and autonomously between two modes based on respective reference switch states of the two modes. In another embodiment, a mode transition is performed based on a signal which a control sensor generates based on a rate of switch events of the voltage regulator, and predetermined reference information indicating current characteristics of the voltage regulator.Type: ApplicationFiled: April 1, 2022Publication date: October 5, 2023Applicant: Intel CorporationInventors: Tamir Salus, Nicolas Butzen, Arvind Raghavan, Harish Krishnamurthy
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Patent number: 10454598Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, providing a first instruction to mobile user equipment to cause the mobile user equipment to perform a first channel quality assessment of a non-reduced power subframe of a wireless signal comprising the non-reduced power subframe, an almost blank subframe and a reduced power subframe. A second instruction is provided to the mobile user equipment to cause the mobile user equipment to perform a second channel quality assessment of the almost blank subframe. A determination is made as to whether the mobile user equipment is performing instantaneous channel quality measurements based on a result of the first channel quality assessment and a result of the second channel quality assessment. Other embodiments are disclosed.Type: GrantFiled: April 13, 2018Date of Patent: October 22, 2019Assignee: AT&T Intellectual Property I, L.P.Inventors: Arvind Raghavan, Arunabha Ghosh
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Publication number: 20180234195Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, providing a first instruction to mobile user equipment to cause the mobile user equipment to perform a first channel quality assessment of a non-reduced power subframe of a wireless signal comprising the non-reduced power subframe, an almost blank subframe and a reduced power subframe. A second instruction is provided to the mobile user equipment to cause the mobile user equipment to perform a second channel quality assessment of the almost blank subframe. A determination is made as to whether the mobile user equipment is performing instantaneous channel quality measurements based on a result of the first channel quality assessment and a result of the second channel quality assessment. Other embodiments are disclosed.Type: ApplicationFiled: April 13, 2018Publication date: August 16, 2018Applicant: AT&T Intellectual Property I, L.P.Inventors: Arvind Raghavan, Arunabha Ghosh
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Patent number: 9973288Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, providing a first instruction to mobile user equipment to cause the mobile user equipment to perform a first channel quality assessment of a non-reduced power subframe of a wireless signal comprising the non-reduced power subframe, an almost blank subframe and a reduced power subframe. A second instruction is provided to the mobile user equipment to cause the mobile user equipment to perform a second channel quality assessment of the almost blank subframe. A determination is made as to whether the mobile user equipment is performing instantaneous channel quality measurements based on a result of the first channel quality assessment and a result of the second channel quality assessment. Other embodiments are disclosed.Type: GrantFiled: February 21, 2017Date of Patent: May 15, 2018Assignee: AT&T Intellectual Property I, L.P.Inventors: Arvind Raghavan, Arunabha Ghosh
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Patent number: 9711997Abstract: A system and method for storing and distributing DC power, comprising: a first desk with a horizontal desktop surface and vertical support surfaces, batteries, a charging circuit with an AC to DC power converter, one AC power input channel, one DC power input channel, and DC power output channels; a second desk with a horizontal desktop surface and vertical support surfaces, batteries, a charging circuit with an AC to DC power converter, one AC power input channel, one DC power input channel, and DC power output channels; and electrical information processors adapted to the charging circuits to regulate and allocate DC power between batteries and DC power output channels within a chain of electrically connected desks by measuring and controlling charges and electric currents from charging circuits to batteries, from charging circuits to DC power output channels, and from batteries to DC output channels.Type: GrantFiled: March 5, 2015Date of Patent: July 18, 2017Assignee: Blue Clover Design, LLCInventors: Arvind Raghavan, Peter Staples
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Publication number: 20170163360Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, providing a first instruction to mobile user equipment to cause the mobile user equipment to perform a first channel quality assessment of a non-reduced power subframe of a wireless signal comprising the non-reduced power subframe, an almost blank subframe and a reduced power subframe. A second instruction is provided to the mobile user equipment to cause the mobile user equipment to perform a second channel quality assessment of the almost blank subframe. A determination is made as to whether the mobile user equipment is performing instantaneous channel quality measurements based on a result of the first channel quality assessment and a result of the second channel quality assessment. Other embodiments are disclosed.Type: ApplicationFiled: February 21, 2017Publication date: June 8, 2017Inventors: Arvind Raghavan, Arunabha Ghosh
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Patent number: 9615278Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, providing a first instruction to mobile user equipment to cause the mobile user equipment to perform a first channel quality assessment of a non-reduced power subframe of a wireless signal comprising the non-reduced power subframe, an almost blank subframe and a reduced power subframe. A second instruction is provided to the mobile user equipment to cause the mobile user equipment to perform a second channel quality assessment of the almost blank subframe. A determination is made as to whether the mobile user equipment is performing instantaneous channel quality measurements based on a result of the first channel quality assessment and a result of the second channel quality assessment. Other embodiments are disclosed.Type: GrantFiled: February 9, 2015Date of Patent: April 4, 2017Assignee: AT&T Intellectual Property I, L.P.Inventors: Arvind Raghavan, Arunabha Ghosh
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Publication number: 20150256031Abstract: A system and method for storing and distributing DC power, comprising: a first desk with a horizontal desktop surface and vertical support surfaces, batteries, a charging circuit with an AC to DC power converter, one AC power input channel, one DC power input channel, and DC power output channels; a second desk with a horizontal desktop surface and vertical support surfaces, batteries, a charging circuit with an AC to DC power converter, one AC power input channel, one DC power input channel, and DC power output channels; and electrical information processors adapted to the charging circuits to regulate and allocate DC power between batteries and DC power output channels within a chain of electrically connected desks by measuring and controlling charges and electric currents from charging circuits to batteries, from charging circuits to DC power output channels, and from batteries to DC output channels.Type: ApplicationFiled: March 5, 2015Publication date: September 10, 2015Inventors: Arvind Raghavan, Peter Staples
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Publication number: 20150156656Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, providing a first instruction to mobile user equipment to cause the mobile user equipment to perform a first channel quality assessment of a non-reduced power subframe of a wireless signal comprising the non-reduced power subframe, an almost blank subframe and a reduced power subframe. A second instruction is provided to the mobile user equipment to cause the mobile user equipment to perform a second channel quality assessment of the almost blank subframe. A determination is made as to whether the mobile user equipment is performing instantaneous channel quality measurements based on a result of the first channel quality assessment and a result of the second channel quality assessment. Other embodiments are disclosed.Type: ApplicationFiled: February 9, 2015Publication date: June 4, 2015Inventors: Arvind Raghavan, Arunabha Ghosh
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Patent number: 8983393Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, identifying a wireless device that is unable to distinguish between a non-reduced power subframe and a reduced-power, subframe of a communications protocol including a frame having a pre-defined arrangement of non-reduced power subframes and reduced-power subframes. First and second instructions are sent to the wireless device to respectively perform a first channel quality assessment of a non-reduced power subframe and a second channel quality assessment of a reduced-power subframe. The first and second instructions respectively identify the non-reduced power subframes and the reduced-power subframes within which the first and second channel quality assessments are to be performed. After receiving the first and second channel quality assessments, it is determined whether the channel quality assessment performed by the wireless device includes instantaneous measurements.Type: GrantFiled: December 13, 2012Date of Patent: March 17, 2015Assignee: AT&T Intellectual Property I, LPInventors: Arvind Raghavan, Arunabha Ghosh
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Publication number: 20140170985Abstract: A process, device and computer-readable storage medium that incorporate teachings of the subject disclosure may include, for example, identifying a wireless device that is unable to distinguish between a non-reduced power subframe and a reduced-power, subframe of a communications protocol including a frame having a pre-defined arrangement of non-reduced power subframes and reduced-power subframes. First and second instructions are sent to the wireless device to respectively perform a first channel quality assessment of a non-reduced power subframe and a second channel quality assessment of a reduced-power subframe. The first and second instructions respectively identify the non-reduced power subframes and the reduced-power subframes within which the first and second channel quality assessments are to be performed. After receiving the first and second channel quality assessments, it is determined whether the channel quality assessment performed by the wireless device includes instantaneous measurements.Type: ApplicationFiled: December 13, 2012Publication date: June 19, 2014Applicant: AT&T INTELLECTUAL PROPERTY I, LPInventors: Arvind Raghavan, Arunabha Ghosh
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Patent number: 8605566Abstract: A circuit can process a sample of a signal to emulate, simulate, or model an effect on the signal. Thus, an emulation circuit can produce a representation of a real-world signal transformation by processing the signal according to one or more signal processing parameters that are characteristic of the real-world signal transformation. The emulation circuit can apply analog signal processing and/or mixed signal processing to the signal. The signal processing can comprise feeding the signal through two signal paths, each having a different delay, and creating a weighted sum of the outputs of the two signal paths. The signal processing can also (or alternatively) comprise routing the signal through a network of delay elements, wherein a bank of switching or routing elements determines the route and thus the resulting delay.Type: GrantFiled: August 25, 2010Date of Patent: December 10, 2013Assignee: Quellan, Inc.Inventors: Bruce C. Schmukler, Arvind Raghavan, Ziba Nami, Jyothi Emmanuel Peddi, Andrew Joo Kim, Michael G. Vrazel, Charles E. Summers
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Publication number: 20110069604Abstract: A circuit can process a sample of a signal to emulate, simulate, or model an effect on the signal. Thus, an emulation circuit can produce a representation of a real-world signal transformation by processing the signal according to one or more signal processing parameters that are characteristic of the real-world signal transformation. The emulation circuit can apply analog signal processing and/or mixed signal processing to the signal. The signal processing can comprise feeding the signal through two signal paths, each having a different delay, and creating a weighted sum of the outputs of the two signal paths. The signal processing can also (or alternatively) comprise routing the signal through a network of delay elements, wherein a bank of switching or routing elements determines the route and thus the resulting delay.Type: ApplicationFiled: August 25, 2010Publication date: March 24, 2011Applicant: Quellan, Inc.Inventors: Bruce C. Schmukler, Arvind Raghavan, Ziba Nami, Jyothi Emmanuel Peddi, Andrew Joo Kim, Michael G. Vrazel, Charles E. Summers
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Patent number: 7804760Abstract: A circuit can process a sample of a signal to emulate, simulate, or model an effect on the signal. Thus, an emulation circuit can produce a representation of a real-world signal transformation by processing the signal according to one or more signal processing parameters that are characteristic of the real-world signal transformation. The emulation circuit can apply analog signal processing and/or mixed signal processing to the signal. The signal processing can comprise feeding the signal through two signal paths, each having a different delay, and creating a weighted sum of the outputs of the two signal paths. The signal processing can also (or alternatively) comprise routing the signal through a network of delay elements, wherein a bank of switching or routing elements determines the route and thus the resulting delay.Type: GrantFiled: August 23, 2006Date of Patent: September 28, 2010Assignee: Quellan, Inc.Inventors: Bruce C. Schmukler, Arvind Raghavan, Ziba Nami, Jyothi Emmanuel Peddi, Andrew Joo Kim, Michael G. Vrazel, Charles E. Summers