Patents by Inventor Arvind Srinivasan

Arvind Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250055813
    Abstract: System and method for supporting scalable bitmap based P_Key table in a high performance computing environment. A method can provide, at least one subnet comprising one or more switches, a plurality of host channel adapters, and a plurality of end nodes. The method can associate the plurality of end nodes with at least one of a plurality of partitions, wherein each of the plurality of partitions are associated with a P_Key value. The method can associate each of the one or more switches with a bitmap based P_Key table of a plurality of bitmap based P_Key tables. The method can associate each of the host channel adapters with a bitmap based P_Key table of the plurality of bitmap based P_Key tables.
    Type: Application
    Filed: October 14, 2024
    Publication date: February 13, 2025
    Inventors: BJØRN DAG JOHNSEN, ARVIND SRINIVASAN, LINE HOLEN
  • Patent number: 12218855
    Abstract: A system for facilitating RDMA transmit flow scheduling and pacing is disclosed. The system may determine a set of groups. The groups may be associated with a range of transmission rates. The system may determine a transmission rate of a queue pair. The system may assign the QP to a first group of the set of groups. The transmission rate of the QP may be within the range of transmission rates of the first group. The system may determine an available QP of at least one group from the set of groups. The system may schedule transmission, by an arbiter, of the available QP. The system may transmit, by the arbiter, a message associated with the available QP.
    Type: Grant
    Filed: February 10, 2023
    Date of Patent: February 4, 2025
    Assignee: Meta Platforms, Inc.
    Inventors: Ashay Narsale, Arvind Srinivasan
  • Patent number: 12212600
    Abstract: Examples described herein relate to a Transport Layer Security (TLS) offload engine to: based on detection of encrypted data unassociated with a previously detected data header: search for one or more data headers; identify at least two candidate data headers for validation; and based on receipt of an indication that the at least two candidate data headers are valid, perform decryption of received data in one or more packets. In some examples, the TLS offload engine is to: based on receipt of an indication that one or more of the at least two candidate data headers is not a valid header, search for two or more other candidate data headers.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: January 28, 2025
    Assignee: Intel Corporation
    Inventors: Helia A. Naeimi, Sivakumar Munnangi, Namrata Limaye, Arvind Srinivasan, Gargi Saha, Hung Nguyen, Daniel Daly
  • Patent number: 12212502
    Abstract: Examples described herein relate to technologies for reliable packet transmission. In some examples, a network interface includes circuitry to: receive a request to transmit a packet to a destination device, select a path for the packet, provide a path identifier identifying one of multiple paths from the network interface to a destination and Path Sequence Number (PSN) for the packet, wherein the PSN is to identify a packet transmission order over the selected path, include the PSN in the packet, and transmit the packet. In some examples, if the packet is a re-transmit of a previously transmitted packet, the circuitry is to: select a path for the re-transmit packet, and set a PSN of the re-transmit packet that is a current packet transmission number for the selected path for the re-transmit packet.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: January 28, 2025
    Assignee: Intel Corporation
    Inventors: Mark Debbage, Robert Southworth, Arvind Srinivasan, Cheolmin Park, Todd Rimmer, Brian S. Hausauer
  • Patent number: 12192236
    Abstract: Examples described herein relate to an interface that is to receive data for transmission and based on indication of failure of receipt of one or more packets that carry segments of the data, cause re-transmission of solely one or more of the multiple packets that comprise a segment of the data referenced by the indication of failure of receipt of one or more packets. In some examples, the interface is to encrypt the data using an encryption engine and to segment the data for transmission using one or more packets. In some examples, the interface is to receive the data and an indication of which segment of the data to re-transmit; encrypt the data; segment the encrypted data into one or more packets; and based on the indication of which segment of the data to re-transmit, transmit solely one or more of the multiple packets that comprise a segment of the data referenced by the indication of failure of receipt of one or more packets.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: January 7, 2025
    Assignee: Intel Corporation
    Inventors: Arvind Srinivasan, Daniel Daly
  • Publication number: 20240378097
    Abstract: A system includes a first integrated circuit package including a first group of one or more artificial intelligence processing units and a first chip-to-chip interconnect communication unit and a second integrated circuit package including a second group of one or more artificial intelligence processing units and a second chip-to-chip interconnect communication unit. The system also includes an interconnect between the first integrated circuit package and the second integrated circuit package, wherein the first chip-to-chip interconnect communication unit and the second chip-to-chip interconnect communication unit manage Ethernet-based communication via the interconnect using a layered communication architecture supporting a credit-based data flow control and a retransmission data flow control.
    Type: Application
    Filed: July 8, 2024
    Publication date: November 14, 2024
    Applicant: Meta Plattforms, Inc.
    Inventors: Pankaj KANSAL, Arvind Srinivasan, Harikrishna Madadi Reddy, Naader Hasani
  • Patent number: 12120043
    Abstract: System and method for supporting scalable bitmap based P_Key table in a high performance computing environment. A method can provide, at least one subnet comprising one or more switches, a plurality of host channel adapters, and a plurality of end nodes. The method can associate the plurality of end nodes with at least one of a plurality of partitions, wherein each of the plurality of partitions are associated with a P_Key value. The method can associate each of the one or more switches with a bitmap based P_Key table of a plurality of bitmap based P_Key tables. The method can associate each of the host channel adapters with a bitmap based P_Key table of the plurality of bitmap based P_Key tables.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: October 15, 2024
    Inventors: Bjørn Dag Johnsen, Arvind Srinivasan, Line Holen
  • Patent number: 12074799
    Abstract: Methods for improving end-to-end congestion reaction using adaptive routing and congestion-hint based throttling for IP-routed datacenter networks and associated apparatus. In connection with forwarding packets between sending and receiving endpoints coupled to one or more networks, one or more network switches are configured to detect current or approaching congestion conditions, generate congestion notification packets (CNPs), and return the CNPs to sending endpoints. The CNPs may be routed using one or more adaptive routing mechanisms to forward the CNPs along non-congested paths or may be forwarded along a fastest path to a sender. The CNPs further may comprise meta-data including a flow identifier associated with a packet sent from an endpoint, a congestion level for the flow, and a timestamp.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: August 27, 2024
    Assignee: Intel Corporation
    Inventors: Arvind Srinivasan, Malek Musleh, Allister Alemania, Roberto Penaranda Cebrian
  • Publication number: 20240275736
    Abstract: A system for facilitating RDMA transmit flow scheduling and pacing is disclosed. The system may determine a set of groups. The groups may be associated with a range of transmission rates. The system may determine a transmission rate of a queue pair. The system may assign the QP to a first group of the set of groups. The transmission rate of the QP may be within the range of transmission rates of the first group. The system may determine an available QP of at least one group from the set of groups. The system may schedule transmission, by an arbiter, of the available QP. The system may transmit, by the arbiter, a message associated with the available QP.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 15, 2024
    Inventors: Ashay Narsale, Arvind Srinivasan
  • Patent number: 12061939
    Abstract: A system includes a first integrated circuit package including a first group of one or more artificial intelligence processing units and a first chip-to-chip interconnect communication unit and a second integrated circuit package including a second group of one or more artificial intelligence processing units and a second chip-to-chip interconnect communication unit. The system also includes an interconnect between the first integrated circuit package and the second integrated circuit package, wherein the first chip-to-chip interconnect communication unit and the second chip-to-chip interconnect communication unit manage ethernet-based communication via the interconnect using a layered communication architecture supporting a credit-based data flow control and a retransmission data flow control.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: August 13, 2024
    Assignee: META PLATFORMS, INC.
    Inventors: Pankaj Kansal, Arvind Srinivasan, Harikrishna Madadi Reddy, Naader Hasani
  • Publication number: 20240259318
    Abstract: A system for Remote Direct Memory Access incast congestion management is provided. The system may access one or more receive work queue entities (RWQEs) associated with one or more send work queue entities (SWQEs), determine a transmission rate based on an available bandwidth and a number of transmitter devices associated with the one or more SWQEs, and transmit a rate control notification (RCN) message to a transmitter device associated with a send work queue entity of the one or more SWQEs, wherein the rate control notification message comprises the determined transmission rate.
    Type: Application
    Filed: January 30, 2023
    Publication date: August 1, 2024
    Inventors: Zeeshan Altaf Lokhandwala, Arvind Srinivasan
  • Publication number: 20240243992
    Abstract: Systems, apparatuses and methods provide technology that identifies a message that is to be transmitted across a network, divides the message into a plurality of portions that are arranged in a first order, and generates a plurality of packets based on the plurality of portions. The technology maps different network paths for the plurality of packets to be transmitted to a destination, sets headers of the plurality of packets to represent the first order and the different network paths, transmits the plurality of packets over the network in an out-of-order fashion to the destination based on the headers, and arranges the plurality of transmitted packets into the first order based on the headers of the plurality of packets.
    Type: Application
    Filed: January 13, 2023
    Publication date: July 18, 2024
    Applicant: Meta Platforms, Inc.
    Inventors: Zeeshan Altaf Lokhandwala, Arvind Srinivasan
  • Publication number: 20240205140
    Abstract: A system for adapting to a partially unhealthy network and bypassing failures associated with the network is provided. The system may enable determining a designated network path configured to transfer traffic data from a first communication device, via one or more network switches, to a second communication device. The system may enable determining at least one network failure, associated with the network path, causing at least a subset of the traffic data to be blocked along the network path. The system may enable determining one or more tracker windows associated with one or more other network paths that are available to transfer traffic content. The system may enable selecting at least one network path of the one or more other network paths to transfer the at least the subset of the traffic data to the second communication device.
    Type: Application
    Filed: August 31, 2023
    Publication date: June 20, 2024
    Inventors: Zeeshan Altaf Lokhandwala, Arvind Srinivasan
  • Publication number: 20240177102
    Abstract: Embodiments detect stops by an entity on a pre-planned trip including a plurality of stops and a planned sequence of stops, each stop including a geofence boundary. For each stop, embodiments add an arrival transition region extending inward from the geofence boundary. Embodiments receive a first geo-location message indicating a first location and corresponding to a first time for the entity and determine whether the first location falls within a first arrival transition region corresponding to a first stop having a first geofence boundary. When the first location falls within the first arrival transition region, embodiments wait for a predefined transitional time period. During the predefined transitional time period, when a second geo-location message is received indicating a second location inside the first geofence boundary and outside the first arrival transition region, the first time is determined to be an arrival time for the first stop.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Bharath T. S., Rahul PAUL, Sourath ROY, Arvind SRINIVASAN
  • Patent number: 11916800
    Abstract: Examples describe an egress port manager that uses an adaptive jitter selector to apply a jitter threshold level for a buffer, wherein the jitter threshold level is to indicate when egress of a packet segment from the buffer is allowed, wherein a packet segment comprises a packet header and wherein the jitter threshold level is adaptive based on a switch fabric load. In some examples, the jitter threshold level is to indicate a number of segments for the buffer's head of line (HOL) packet that are to be in the buffer or indicate a timer that starts at a time of issuance of a first read request for a first segment of the packet in the buffer. In some examples, the jitter threshold level is not more than a maximum transmission unit (MTU) size associated with the buffer.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: February 27, 2024
    Assignee: Intel Corporation
    Inventors: David Arditti Ilitzky, John Greth, Robert Southworth, Karl S. Papadantonakis, Bongjin Jung, Arvind Srinivasan
  • Patent number: 11884293
    Abstract: Disclosed are autonomous vehicles that may autonomously navigate at least a portion of a route defined by a service request allocator. The autonomous vehicle may, at a certain portion of the route, request remote assistance. In response to the request, an operator may provide input to a console that indicates control positions for one or more vehicle controls such as steering position, brake position, and/or accelerator position. A command is sent to the autonomous vehicle indicating how the vehicle should proceed along the route. When the vehicle reaches a location where remote assistance is no longer required, the autonomous vehicle is released from manual control and may then continue executing the route under autonomous control.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: January 30, 2024
    Assignee: Uber Technologies, Inc.
    Inventors: Arvind Srinivasan, Samann Ghorbanian-Matloob, Sean Shanshi Chen, Eli Schleifer, Shelley Bower, Patrick Willett
  • Publication number: 20230403237
    Abstract: According to examples, a system for aligning a plurality of variously encoded content streams is described. The system may include a processor and a memory storing instructions. The processor, when executing the instructions, may cause the system to receive a request to transmit one or more packets of a message over a network, upon receive the request, designate a message sequence number (MSN) for the message, and upon receive the request, designate a packet sequence number (PSN) for one or more packets of the message.
    Type: Application
    Filed: June 8, 2022
    Publication date: December 14, 2023
    Applicant: Meta Platforms, Inc.
    Inventors: Arvind SRINIVASAN, Nicolaas Johannes Viljoen, Pankaj Kansal, Ashay Narsale
  • Publication number: 20230385138
    Abstract: A system includes a first integrated circuit package including a first group of one or more artificial intelligence processing units and a first chip-to-chip interconnect communication unit and a second integrated circuit package including a second group of one or more artificial intelligence processing units and a second chip-to-chip interconnect communication unit. The system also includes an interconnect between the first integrated circuit package and the second integrated circuit package, wherein the first chip-to-chip interconnect communication unit and the second chip-to-chip interconnect communication unit manage ethernet-based communication via the interconnect using a layered communication architecture supporting a credit-based data flow control and a retransmission data flow control.
    Type: Application
    Filed: May 25, 2022
    Publication date: November 30, 2023
    Inventors: Pankaj Kansal, Arvind Srinivasan, Harikrishna Madadi Reddy, Naader Hasani
  • Patent number: 11824749
    Abstract: System and method for using multiple global identification subnet prefix values in a network switch environment in a high performance computing environment. A packet is received from a network fabric by a first Host Channel Adapter (HCA). The packet has a header portion including a destination subnet prefix identifying a destination subnet of the network fabric. The network HCA is allowed to receive the first packet from a port of the network HCA by selectively determining a logical state of a flag and, selectively in accordance with a predetermined logical state of the flag, ignoring the destination subnet prefix identifying the destination subnet of the network fabric.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: November 21, 2023
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Bjørn Dag Johnsen, Arvind Srinivasan, Brian Manula
  • Publication number: 20230370203
    Abstract: According to examples, a selective acknowledgement framework may be implemented within a communication system for efficient communication of acknowledgement packets. A plurality of data packets generated from a message may be transmitted as a segment of data packets to a receiver which generates an acknowledgement packet for the segment of data packets. A compact format of acknowledgement (ACK) or negative acknowledgement (NACK) for the segment of data packets may be implemented in the acknowledgement packet via bits of a selective acknowledgement bit vector. Based on the other values also conveyed in the acknowledgement packet, the transmitter may identify those data packets that were properly received and the data packets that need to be re-transmitted.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Meta Platforms, Inc.
    Inventors: Arvind SRINIVASAN, Zeeshan Altaf LOKHANDWALA, Pankaj KANSAL, Nicolaas Johannes VILJOEN