Abstract: An integrated circuit that includes a controller and multiple internal circuitries, whereas the integrated circuit is characterized by further including a security mode determination unit that includes multiple one time programmable components for defining a security mode out of multiple possible security modes, whereas a selected circuitry mode affects access to an internal circuitry. A method for testing an integrated circuit, the method includes: receiving a request to access an internal circuitry; and responding to the request in view of a defined security mode; whereas the method is characterized by a stage of defining a security mode of a debug circuit out of multiple security modes, whereas the definition is responsive to at least a state of multiple one time programmable components.

Abstract: Under the direction of a first party, an integrated circuit (IC) device is configured to temporarily enable access to a debug interface of the IC device via authentication of the first party by a challenge/response process using a key of the IC device and a challenge value generated at the IC device. The first party then may conduct a software evaluation of the IC device via the debug interface. In response to failing to identify an issue with the IC device from the software evaluation, the first party can permanently enable open access to the debug interface while authenticated and provide the IC device to a second party. Under the direction of the second party, a hardware evaluation of the IC device is conducted via the debug interface that was permanently opened by the first party.

Abstract: Crawling a browser-accessible application by causing a target application and a bridge application to run concurrently in a browser-controllable player, and iteratively receiving from the bridge application current state information of the target application, storing the state information on a data storage device if the state information is not found on the data storage device, where the state information is stored as a descendant state of an initial state of the target application, and interacting with the target application in accordance with a predefined simulation algorithm, thereby effecting a new state of the target application, until a predefined termination condition is reached.

Abstract: A device having a power supply monitoring capabilities, the device includes: a power supply unit; at least one real time clock generator counter adapted to receive a supply voltage from the power supply unit; a fixed value storage circuit that is un-accessible to software executed by a processor; wherein the fixed value storage circuit stores a fixed value; wherein the fixed value includes multiple bits; a volatile storage unit, being accessible to the processor; wherein the volatile storage unit is adapted to: (i) store a reset value after being reset; (ii) receive the fixed value during an initialization state; and (iii) store the fixed value until being reset; wherein the volatile storage unit is designed such that there is a low probability that the reset value equals the fixed value; and a comparator adapted to provide a tamper indication if the fixed value stored at the fixed value storage circuit differs from a value stored at the volatile storage unit.

Abstract: An encryption apparatus (14) includes a secure processing system (12) in the form of an integrated circuit. The secure processing system (12) includes an on-chip secure memory system (30). The secure memory system (30) includes a non-volatile, read-only, permanent key register (62) in which a permanent cryptographic key (64) is stored. The secure memory system (30) also includes a non-volatile, read-write, erasable key register (56) in which an erasable cryptographic key (60) is stored. Symmetric cryptographic operations take place in an encryption engine (46) using an operating cryptographic key (68) formed by combining (96) the permanent and erasable keys (64, 60). A tamper detection circuit (70) detects tampering and erases the erasable key (60) when a tamper event is detected.

Abstract: A method of generating a non-reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device includes a bitcell having a first MTJ and a second MTJ and programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell.

Abstract: A near eye image display system includes an image projector, a beam combiner assembly, and an optical assembly, optically coupled between the image projector and the beam combiner assembly. The image projector projects a display image toward an optical pathway, the optical pathway intersecting a viewing axis, the viewing axis extending from the eye of a user to an ambient scene. The beam combiner assembly includes a plurality of beam combiners optically cascaded along the optical pathway, each of the beam combiners being disposed diagonally to the optical pathway and diagonally to the viewing axis. Each of the beam combiners is arranged such that for each two adjacent beam combiners, the first of the adjacent beam combiners is optically located between the second of the adjacent beam combiners and the image projector.

Abstract: An integrated circuit can be made more secure by programming a one time programmable circuit so that different signals are provided on terminals as compared to when the integrated circuit was not secure. Instead, or in addition, the integrated circuit can be made more secure by providing decode circuitry that can be used with the one time programmable circuit to select different internal address maps in response to an address value. The decode circuitry can use a first address map when the integrated circuit is secure, and a different address map when the integrated circuit is non-secure.

Abstract: A device for providing a security breach indicative audio alert. The device includes: a security monitor adapted to detect a security breach in device and a loudspeaker, the device wherein including a secure audio alert generating hardware, adapted to participate, in response to the detection of the security breach, in a generation of a security breach indicative audio alert. The secure audio alert generating hardware is connected to an audio mixer that is adapted to mix the security breach indicative audio alert signal with audio signals generated by a software controlled audio source to provide a mixed signal. The audio mixer is further adapted to provide the mixed signal to the loudspeaker that reproduces the mixed signal as sound.

Abstract: Crawling a browser-accessible application by causing a target application and a bridge application to run concurrently in a browser-controllable player, and iteratively receiving from the bridge application current state information of the target application, storing the state information on a data storage device if the state information is not found on the data storage device, where the state information is stored as a descendant state of an initial state of the target application, and interacting with the target application in accordance with a predefined simulation algorithm, thereby effecting a new state of the target application, until a predefined termination condition is reached.

Abstract: A device and a method for protecting a cryptographic module of which the method includes: estimating a functionality of a circuit that is adapted to malfunction when a physical parameter has a first value different from a nominal parameter value at which the cryptographic module functions correctly. The cryptographic module malfunctions when the physical parameter has a second value different from the nominal parameter value and a difference between the first value and the nominal parameter value being smaller than a difference between the second value and the nominal parameter value. A cryptographic module protective measure is applied if estimating that the circuit malfunctions.

Abstract: Method for monitoring a real time clock and a device having real time clock monitoring capabilities, the device includes: (i) a real time clock tree, (ii) a clock frequency monitor that is adapted to determine a frequency of a real time clock signal, during a short monitoring period; (iii) a monitoring enable module, adapted to activate the clock frequency monitor during short motoring periods and to deactivate the clock frequency monitor during other periods, wherein the monitoring enable module is adapted to determine a timing of the short monitoring periods in a non-deterministic manner; and (iv) a real time clock violation indication generator adapted to indicate that a real time clock violation occurred, in response to an error signal provided from the clock frequency monitor.

Abstract: An integrated circuit can be made more secure by programming a one time programmable circuit so that different signals are provided on terminals as compared to when the integrated circuit was not secure. Instead, or in addition, the integrated circuit can be made more secure by providing decode circuitry that can be used with the one time programmable circuit to select different internal address maps in response to an address value. The decode circuitry can use a first address map when the integrated circuit is secure, and a different address map when the integrated circuit is non-secure.

Abstract: Enhanced vision system for assisting aircraft piloting, the system including a line-of-sight detector for determining the line-of-sight of the pilot of the aircraft, a head mounted display (HMD) worn by the pilot, and a processor which receives the determined line-of-sight from the line-of-sight detector, receives a spatial image of the external scene to the aircraft, generates symbolic information respective of the aircraft piloting, and superimposes the symbolic information onto the spatial image to produce a combined spatial and symbolic image, the HMD displaying the combined spatial and symbolic image to the pilot in real-time, in alignment with the determined line-of-sight. The spatial image may be an image combined from a sensor image and a synthetic image. A communication interface may be coupled to the HMD allowing the pilot to receive and confirm flight instructions.

Abstract: Method for monitoring a real time clock and a device having real time clock monitoring capabilities, the device includes: (i) a real time clock tree, (ii) a clock frequency monitor that is adapted to determine a frequency of a real time clock signal, during a short monitoring period; (iii) a monitoring enable module, adapted to activate the clock frequency monitor during short motoring periods and to deactivate the clock frequency monitor during other periods, wherein the monitoring enable module is adapted to determine a timing of the short monitoring periods in a non-deterministic manner; and (iv) a real time clock violation indication generator adapted to indicate that a real time clock violation occurred, in response to an error signal provided from the clock frequency monitor.

Abstract: Under the direction of a first party, an integrated circuit (IC) device is configured to temporarily enable access to a debug interface of the IC device via authentication of the first party by a challenge/response process using a key of the IC device and a challenge value generated at the IC device. The first party then may conduct a software evaluation of the IC device via the debug interface. In response to failing to identify an issue with the IC device from the software evaluation, the first party can permanently enable open access to the debug interface while authenticated and provide the IC device to a second party. Under the direction of the second party, a hardware evaluation of the IC device is conducted via the debug interface that was permanently opened by the first party.

Abstract: System for improving audiovisual communication, the system including a line of sight determining system for determining a user line of sight of the eyes of a user, and an image display system coupled with the line of sight determining system, the image display system displaying a supplementary image for the eyes, and controlling a property of the supplementary image and of a scene image, according to the determined user line of sight.

Abstract: A device having a power supply monitoring capabilities, the device includes: a power supply unit; at least one real time clock generator counter adapted to receive a supply voltage from the power supply unit; a fixed value storage circuit that is un-accessible to software executed by a processor; wherein the fixed value storage circuit stores a fixed value; wherein the fixed value includes multiple bits; a volatile storage unit, being accessible to the processor; wherein the volatile storage unit is adapted to: (i) store a reset value after being reset; (ii) receive the fixed value during an initialization state; and (iii) store the fixed value until being reset; wherein the volatile storage unit is designed such that there is a low probability that the reset value equals the fixed value; and a comparator adapted to provide a tamper indication if the fixed value stored at the fixed value storage circuit differs from a value stored at the volatile storage unit.

Abstract: An integrated circuit that includes a controller and multiple internal circuitries, whereas the integrated circuit is characterized by further including a security mode determination unit that includes multiple one time programmable components for defining a security mode out of multiple possible security modes, whereas a selected circuitry mode affects access to an internal circuitry. A method for testing an integrated circuit, the method includes: receiving a request to access an internal circuitry; and responding to the request in view of a defined security mode; whereas the method is characterized by a stage of defining a security mode of a debug circuit out of multiple security modes, whereas the definition is responsive to at least a state of multiple one time programmable components.

Abstract: An encryption apparatus (14) includes a secure processing system (12) in the form of an integrated circuit. The secure processing system (12) includes an on-chip secure memory system (30). The secure memory system (30) includes a non-volatile, read-only, permanent key register (62) in which a permanent cryptographic key (64) is stored. The secure memory system (30) also includes a non-volatile, read-write, erasable key register (56) in which an erasable cryptographic key (60) is stored. Symmetric cryptographic operations take place in an encryption engine (46) using an operating cryptographic key (68) formed by combining (96) the permanent and erasable keys (64, 60). A tamper detection circuit (70) detects tampering and erases the erasable key (60) when a tamper event is detected.