Patents by Inventor ASAMI NISHIKAWA

ASAMI NISHIKAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Imaging device including semiconductor substrate and pixels
    Patent number: 11165979
    Abstract: An imaging device includes: a semiconductor substrate; pixels arranged two-dimensionally along row and column directions on the substrate; and one or more interconnection layers located on the semiconductor substrate, including a first signal line extending along the column direction and a second signal line to which a multi-level signal is applied. A first pixel includes: a photoelectric converter; a charge storage region; a first interconnection electrically connected to the charge storage region; and a first transistor that includes a first diffusion layer electrically connected to the first signal line and a second diffusion layer electrically connected to the second signal line and that outputs a signal to the first signal line. The first and second signal lines and the first interconnection are arranged in a first interconnection layer. The second signal line is located between the first interconnection and the first signal line, viewed perpendicularly to the substrate.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: November 2, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Asami Nishikawa, Kazuko Nishimura
  • INTERCONNECT STRUCTURE, SEMICONDUCTOR DEVICE, METHOD OF OPERATING ACTIVE ELEMENT, METHOD OF MANUFACTURING INTERCONNECT STRUCTURE, METHOD OF USING INTERCONNECT STRUCTURE, METHOD OF CONTROLLING INTERCONNECT RESISTANCE OF INTERCONNECT STRUCTURE, METHOD OF EVALUATING INTERCONNECT STRUCTURE, METHOD OF EVALUATING DEVICE, METHOD OF DRIVING DEVICE, AND EVALUATION DEVICE
    Publication number: 20210050513
    Abstract: An interconnect structure according to the present disclosure includes: an interconnect layer containing a metal element as a main component and extending in a direction; a metal layer opposite to the interconnect layer, and a solid electrolyte layer between the interconnect layer and the metal layer. The solid electrolyte layer encloses the interconnect layer at least in a cross-sectional view taken along a plane orthogonal to the direction. The interconnect layer and the metal layer are electrically insulated from each other by the solid electrolyte layer.
    Type: Application
    Filed: August 31, 2020
    Publication date: February 18, 2021
    Inventors: Asami NISHIKAWA, Satoshi SHIBATA, Yu NISHITANI, Tetsuya ASANO, Takuji TSUJITA, Yuta SUGIMOTO
  • IMAGING DEVICE
    Publication number: 20180352181
    Abstract: An imaging device includes: a semiconductor substrate; pixels arranged two-dimensionally along row and column directions on the substrate; and one or more interconnection layers located on the semiconductor substrate, including a first signal line extending along the column direction and a second signal line to which a multi-level signal is applied. A first pixel includes: a photoelectric converter; a charge storage region; a first interconnection electrically connected to the charge storage region; and a first transistor that includes a first diffusion layer electrically connected to the first signal line and a second diffusion layer electrically connected to the second signal line and that outputs a signal to the first signal line. The first and second signal lines and the first interconnection are arranged in a first interconnection layer. The second signal line is located between the first interconnection and the first signal line, viewed perpendicularly to the substrate.
    Type: Application
    Filed: May 22, 2018
    Publication date: December 6, 2018
    Inventors: ASAMI NISHIKAWA, KAZUKO NISHIMURA