Patents by Inventor Ashfaq R. Khan

Ashfaq R. Khan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5548764
    Abstract: A power interrupt device for detecting activity remote from the detector and/or device and for producing a signal capable of interrupting power to a load, such as an electronic display. The detector can sense remote activity, and the activity or associated object need not contact the detector. Depending upon whether the activity is present or not present, the detector and associated interrupt circuitry can turn on or off a power load device such as an electronic display. The power interrupt device is well suited for turning off an electronic display when a user is no longer in the room or working area. The computer can remain running, however, the associated display can be remotely turned off to reduce the amount of heat dissipated from the display during periods when the user is not present.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: August 20, 1996
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Raymond S. Duley, Ashfaq R. Khan
  • Patent number: 4490581
    Abstract: A circuit which controls the selection and activation of one of a plurality of clock circuits arranged in copies. Selection circuitry is used to detect failure of an on-line clock circuit, scan a plurality of available clock circuits in a predetermined sequence and place the next available properly operating clock circuit on line. Control circuitry prevents erroneous clock selection during power-up/power down operations and enables predetermined clock circuit copies to be disabled.
    Type: Grant
    Filed: September 30, 1982
    Date of Patent: December 25, 1984
    Assignee: GTE Automatic Electric Labs Inc.
    Inventors: Ivan L. Edwards, Max S. Macrander, Ashfaq R. Khan
  • Patent number: 4412342
    Abstract: A clock synchronization system for use in a digital switching system including multiple clock circuits. This circuit includes multiple synchronization circuits connected in a master-slave arrangement. Each synchronization circuit includes a counter chain which provides a periodic system framing pulse and a trigger circuit which insures that its slave system framing pulse is in synchronization with the master system framing pulse.
    Type: Grant
    Filed: December 18, 1981
    Date of Patent: October 25, 1983
    Assignee: GTE Automatic Electric Labs Inc.
    Inventors: Ashfaq R. Khan, Ivan L. Edwards
  • Patent number: 4322580
    Abstract: A circuit which selects and enables one of a plurality of clock circuits. Logic circuitry is used to detect failure of an on line clock circuit, scan a plurality of available clock circuits in a predetermined sequence and place the next available properly operating clock circuit on line.
    Type: Grant
    Filed: September 2, 1980
    Date of Patent: March 30, 1982
    Assignee: GTE Automatic Electric Labs Inc.
    Inventors: Ashfaq R. Khan, Max S. Macrander, Konstanty E. Krylow