Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: In some aspects, a method for adjusting an operating frequency of a memory controller is provided, wherein a graphics processing unit (GPU) accesses a memory via the memory controller. The method includes monitoring activity of the GPU to determine an active time of the GPU, comparing the determined active time with an active threshold, and, if the determined active time is greater than the active threshold, increasing the operating frequency of the memory controller.

Abstract: In some aspects, a method for adjusting an operating frequency of a memory controller is provided, wherein a graphics processing unit (GPU) accesses a memory via the memory controller. The method includes monitoring activity of the GPU to determine an active time of the GPU, comparing the determined active time with an active threshold, and, if the determined active time is greater than the active threshold, increasing the operating frequency of the memory controller.

Abstract: An apparatus configured to record and process video information includes a memory, display, and a processor in communication with the memory and the display. The memory is configured to store video data. The display is configured to display a preview of the video data. The processor is configured to record the video data at a first frame rate, process the recorded video data via removing one or more frames from the recorded video data, the processed video data having a second frame rate that is lower than the first frame rate, and generate the preview to be displayed by the display based at least in part on the processed video data.

Abstract: Methods, systems, and circuits for preserving state information during power saving operations are disclosed. One example embodiment includes a circuit having a processing core, where the processing core includes logic processing circuits as well as circuits (e.g., flip-flops registers) that are used to store state information in the processing core. The logic processing circuits have power connections to a power rail that are subject to a switch, which can disconnect the power connections from the power rail. The circuits that are used to store state information have different power connections that are subject to a different switch. Therefore, the logic processing circuits and the state information circuits can be separately power-collapsed.

Abstract: An apparatus configured to record and process video information includes a memory, display, and a processor in communication with the memory and the display. The memory is configured to store video data. The display is configured to display a preview of the video data. The processor is configured to record the video data at a first frame rate, process the recorded video data via removing one or more frames from the recorded video data, the processed video data having a second frame rate that is lower than the first frame rate, and generate the preview to be displayed by the display based at least in part on the processed video data.

Abstract: Methods, systems, and circuits for preserving state information during power saving operations are disclosed. One example embodiment includes a circuit having a processing core, where the processing core includes logic processing circuits as well as circuits (e.g., flip-flops registers) that are used to store state information in the processing core. The logic processing circuits have power connections to a power rail that are subject to a switch, which can disconnect the power connections from the power rail. The circuits that are used to store state information have different power connections that are subject to a different switch. Therefore, the logic processing circuits and the state information circuits can be separately power-collapsed.

Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: Certain aspects of the present disclosure relate to methods and apparatuses for handling malicious attacks. In one aspect, the methods and apparatuses are configured to identify packets received from a malicious source based at least in part on packets received by a wireless device that change a state of the wireless device from a dormant state to a connected state, selectively disconnect the wireless device from a packet data network (PDN) by releasing a first Internet Protocol (IP) address used to connect the wireless device to the PDN when a number of packets identified as received from the malicious source reaches a threshold number within a monitoring period, and reconnect the wireless device to the PDN using a second IP address that is different from the first IP address. In another aspect, a connection to an IP Multimedia Subsystem (IMS) PDN is maintained after the PDN is disconnected.

Abstract: Certain aspects of the present disclosure relate to methods and apparatuses for handling malicious attacks. In one aspect, the methods and apparatuses are configured to identify packets received from a malicious source based at least in part on packets received by a wireless device that change a state of the wireless device from a dormant state to a connected state, selectively disconnect the wireless device from a packet data network (PDN) by releasing a first Internet Protocol (IP) address used to connect the wireless device to the PDN when a number of packets identified as received from the malicious source reaches a threshold number within a monitoring period, and reconnect the wireless device to the PDN using a second IP address that is different from the first IP address. In another aspect, a connection to an IP Multimedia Subsystem (IMS) PDN is maintained after the PDN is disconnected.

Abstract: An operating system permits sharing of a sub-process (or process unit) across multiple processes (or tasks). Each shared sub-process has its own context. The sharing is enabled by tracking when a process invokes a sub-process. When a process invokes a sub-process, the process is designated as a parent process of the child sub-process. The invoked sub-process may require use of process level variable data. To enable storage of the process level variable data for each calling process, the variable data is stored in memory using a base address and a fixed offset. Although the based address may vary from process to process, the fixed offset remains the same across processes.

Abstract: This disclosure relates to techniques for preventing or reducing the appearance of undesirable color and/or gray patches in decoded video sequences due to generation of out-of-bound quantized transform coefficients during video encoding. Insufficient compression of a video block according to a selected encoding mode and a selected quantization parameter (QP) value may result in the generation and subsequent clipping of out-of-bound quantized transform coefficients for a given video coding standard. The techniques include predicting whether out-of-bound quantized transform coefficients will be generated for a video block, and adjusting at least one of the selected encoding mode and the selected QP value for the video block to prevent the generation of out-of-bound quantized transform coefficients.

Abstract: This disclosure relates to techniques for preventing or reducing the appearance of undesirable color and/or gray patches in decoded video sequences due to generation of out-of-bound quantized transform coefficients during video encoding. Insufficient compression of a video block according to a selected encoding mode and a selected quantization parameter (QP) value may result in the generation and subsequent clipping of out-of-bound quantized transform coefficients for a given video coding standard. The techniques include predicting whether out-of-bound quantized transform coefficients will be generated for a video block, and adjusting at least one of the selected encoding mode and the selected QP value for the video block to prevent the generation of out-of-bound quantized transform coefficients.

Abstract: A fast sub-process is provided in an operating system for a digital signal processor (DSP). The fast sub-process executes a sub-process without a kernel first determining whether the sub-process resides in an internal memory, as long as certain conditions have been satisfied. One of the conditions is that a programmer determines that the sub-process has been previously loaded into internal memory and executed. Another condition is that the programmer has ensured that a process calling the sub-process has not called any other sub-process between the last execution and the current execution request. Yet another condition is that the programmer ensures that the system has not called another overlapping sub-process between the last execution and the current execution request.

Abstract: An operating system permits sharing of a sub-process (or process unit) across multiple processes (or tasks). Each shared sub-process has its own context. The sharing is enabled by tracking when a process invokes a sub-process. When a process invokes a sub-process, the process is designated as a parent process of the child sub-process. The invoked sub-process may require use of process level variable data. To enable storage of the process level variable data for each calling process, the variable data is stored in memory using a base address and a fixed offset. Although the based address may vary from process to process, the fixed offset remains the same across processes.

Abstract: A fast sub-process is provided in an operating system for a digital signal processor (DSP). The fast sub-process executes a sub-process without a kernel first determining whether the sub-process resides in an internal memory, as long as certain conditions have been satisfied. One of the conditions is that a programmer determines that the sub-process has been previously loaded into internal memory and executed. Another condition is that the programmer has ensured that a process calling the sub-process has not called any other sub-process between the last execution and the current execution request. Yet another condition is that the programmer ensures that the system has not called another overlapping sub-process between the last execution and the current execution request.