Patents by Inventor Ashish K. Choudhury

Ashish K. Choudhury has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8798223
    Abstract: A clock and data recovery device receives a serial data stream and produces recovered clock and data signals. The clock and data recovery device operates over a range of frequencies and without use an external reference clock. A reference clock generator supplies a reference clock signal to a clock and data recovery module that uses the reference clock as a tuning or reference signal to produce the recovered clock and recovered data signals. The reference clock generator modifies the reference clock signal so that its frequency corresponds, within a small tolerance, to the data rate of the serial data stream. The reference clock generator determines a beat frequency between a voltage-controlled oscillator clock signal and the data rate and adjusts the voltage-controlled oscillator frequency, from which the reference clock is generated, to lower the beat frequency below a divided down version of the voltage-controlled oscillator clock.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: August 5, 2014
    Inventor: Ashish K. Choudhury
  • Publication number: 20120163519
    Abstract: A clock and data recovery device receives a serial data stream and produces recovered clock and data signals. The clock and data recovery device operates over a range of frequencies and without use an external reference clock. A reference clock generator supplies a reference clock signal to a clock and data recovery module that uses the reference clock as a tuning or reference signal to produce the recovered clock and recovered data signals. The reference clock generator modifies the reference clock signal so that its frequency corresponds, within a small tolerance, to the data rate of the serial data stream. The reference clock generator determines a beat frequency between a voltage-controlled oscillator clock signal and the data rate and adjusts the voltage-controlled oscillator frequency, from which the reference clock is generated, to lower the beat frequency below a divided down version of the voltage-controlled oscillator clock.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 28, 2012
    Inventor: Ashish K. Choudhury
  • Patent number: 7231008
    Abstract: A method of synchronizing a transmitter and a receiver, comprising: receiving a transmitted serial data stream. Creating an N-bit data sample from the serial data stream. Decoding the N-bit data sample by a ring decoding technique. The ring decoding technique comprises: creating a first code ring using the N-bit data sample, the first code ring having N ring-bit phase positions corresponding to N axis positions, with the N data bits of the N-bit data sample corresponding to one of the N ring-bit phase positions. Creating a pth Code Ring from a previous code ring using a preselected ring coding technique, the pth code ring having N ring-bit phase positions corresponding to N axis positions, with N data bits of the pth code ring corresponding to the N ring-bit phase positions of the pth code ring. Analyzing selected ones of the N data bits of the pth code ring for the presence of a sentinel condition.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: June 12, 2007
    Assignee: Vitesse Semiconductor Corporation
    Inventors: Ashish K. Choudhury, Timothy V. Coe
  • Publication number: 20040096016
    Abstract: Method and apparatus for recovering a clock and/or data from a serial data stream. A multiplexer, a reference clock, and a snapshot register and decoder using ring decoding decodes an N-bit data sample extracting recovered clock phase to determine a clock phase for extracting data.
    Type: Application
    Filed: November 15, 2002
    Publication date: May 20, 2004
    Inventors: Ashish K. Choudhury, Timothy V. Coe
  • Patent number: 6229367
    Abstract: The present invention provides a time delay system that generates a selectable asynchronous time delayed signal from an incoming signal using a pulse having a minimum pulse width and stop-startable oscillator. The time delay system of the present invention produces a minimum data dependency error which is independent of the repetition rate of the incoming signal, the substrate settling time, and the length of the time delay of the delayed signal.
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: May 8, 2001
    Assignee: Vitesse Semiconductor Corp.
    Inventor: Ashish K. Choudhury