Patents by Inventor Ashish Khanna
Ashish Khanna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9310409Abstract: A capacitance-to-voltage interface circuit is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell. The interface circuit includes a capacitive sensing cell, an operational amplifier adapted for selective coupling to the capacitive sensing cell, a feedback capacitor for the operational amplifier, a load capacitor for the operational amplifier, and a switching architecture associated with the capacitive sensing cell, the operational amplifier, the feedback capacitor, and the load capacitor. During use, the switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases. The different operational phases enable the single operational amplifier to be used for both capacitance-to-voltage conversion and voltage amplification.Type: GrantFiled: May 20, 2014Date of Patent: April 12, 2016Assignee: FREESCALE SEMICONDUCTOR INC.Inventors: Ashish Khanna, Sung Jin Jo
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Publication number: 20140253148Abstract: A capacitance-to-voltage interface circuit is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell. The interface circuit includes a capacitive sensing cell, an operational amplifier adapted for selective coupling to the capacitive sensing cell, a feedback capacitor for the operational amplifier, a load capacitor for the operational amplifier, and a switching architecture associated with the capacitive sensing cell, the operational amplifier, the feedback capacitor, and the load capacitor. During use, the switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases. The different operational phases enable the single operational amplifier to be used for both capacitance-to-voltage conversion and voltage amplification.Type: ApplicationFiled: May 20, 2014Publication date: September 11, 2014Inventors: ASHISH KHANNA, SUNG JIN JO
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Patent number: 8766650Abstract: A capacitance-to-voltage interface circuit is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell. The interface circuit includes a capacitive sensing cell, an operational amplifier adapted for selective coupling to the capacitive sensing cell, a feedback capacitor for the operational amplifier, a load capacitor for the operational amplifier, and a switching architecture associated with the capacitive sensing cell, the operational amplifier, the feedback capacitor, and the load capacitor. During use, the switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases. The different operational phases enable the single operational amplifier to be used for both capacitance-to-voltage conversion and voltage amplification.Type: GrantFiled: January 5, 2012Date of Patent: July 1, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Ashish Khanna, Sung Jin Jo
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Publication number: 20120105079Abstract: A capacitance-to-voltage interface circuit is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell. The interface circuit includes a capacitive sensing cell, an operational amplifier adapted for selective coupling to the capacitive sensing cell, a feedback capacitor for the operational amplifier, a load capacitor for the operational amplifier, and a switching architecture associated with the capacitive sensing cell, the operational amplifier, the feedback capacitor, and the load capacitor. During use, the switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases. The different operational phases enable the single operational amplifier to be used for both capacitance-to-voltage conversion and voltage amplification.Type: ApplicationFiled: January 5, 2012Publication date: May 3, 2012Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Ashish Khanna, Sung Jin Jo
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Patent number: 8125231Abstract: A capacitance-to-voltage interface circuit is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell. The interface circuit includes a capacitive sensing cell, an operational amplifier adapted for selective coupling to the capacitive sensing cell, a feedback capacitor for the operational amplifier, a load capacitor for the operational amplifier, and a switching architecture associated with the capacitive sensing cell, the operational amplifier, the feedback capacitor, and the load capacitor. During use, the switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases. The different operational phases enable the single operational amplifier to be used for both capacitance-to-voltage conversion and voltage amplification.Type: GrantFiled: January 28, 2009Date of Patent: February 28, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Ashish Khanna, Sung Jin Jo
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Patent number: 7969167Abstract: A capacitance-to-voltage interface circuit includes a capacitive sensing circuit, an amplification circuit adapted for selective coupling to the capacitive sensing circuit, a capacitor bank comprising a plurality of binary-weighted capacitors, and a switching architecture associated with the capacitive sensing circuit, the amplification circuit, and the capacitor bank. The switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases, including an amplification phase and an analog-to-digital conversion phase. During the amplification phase, the capacitor bank is utilized for offsetting capacitance of the amplification circuit. During the analog-to-digital conversion phase, the capacitor bank is utilized in a successive approximation register.Type: GrantFiled: January 28, 2009Date of Patent: June 28, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Ashish Khanna, Sung Jin Jo
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Patent number: 7796079Abstract: The analog-to-digital converter provided herein includes a capacitor bank comprising a plurality of binary-weighted capacitors, an operational amplifier having an inverting input node, a noninverting input node coupled to analog ground, and an output node, a reset switch, and an input switch. The reset switch is located between the capacitor bank and the operational amplifier, and it selectively couples the capacitor bank to the inverting input node. The input switch has its common terminal coupled to the capacitor bank, and the input switch selectively couples the capacitor bank to either an analog input voltage, a floating terminal, or analog ground. The capacitor bank includes N binary-weighted capacitors and one balancing capacitor that has a unit capacitance. During operation, the analog-to-digital converter generates an N-bit digital output and one polarity bit from the analog input voltage.Type: GrantFiled: January 28, 2009Date of Patent: September 14, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Ashish Khanna, Sung Jin Jo
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Publication number: 20100188107Abstract: A capacitance-to-voltage interface circuit includes a capacitive sensing circuit, an amplification circuit adapted for selective coupling to the capacitive sensing circuit, a capacitor bank comprising a plurality of binary-weighted capacitors, and a switching architecture associated with the capacitive sensing circuit, the amplification circuit, and the capacitor bank. The switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases, including an amplification phase and an analog-to-digital conversion phase. During the amplification phase, the capacitor bank is utilized for offsetting capacitance of the amplification circuit. During the analog-to-digital conversion phase, the capacitor bank is utilized in a successive approximation register.Type: ApplicationFiled: January 28, 2009Publication date: July 29, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Ashish Khanna, Sung Jin Jo
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Publication number: 20100188105Abstract: A capacitance-to-voltage interface circuit is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell. The interface circuit includes a capacitive sensing cell, an operational amplifier adapted for selective coupling to the capacitive sensing cell, a feedback capacitor for the operational amplifier, a load capacitor for the operational amplifier, and a switching architecture associated with the capacitive sensing cell, the operational amplifier, the feedback capacitor, and the load capacitor. During use, the switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases. The different operational phases enable the single operational amplifier to be used for both capacitance-to-voltage conversion and voltage amplification.Type: ApplicationFiled: January 28, 2009Publication date: July 29, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Ashish Khanna, Sung Jin Jo
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Publication number: 20100188278Abstract: The analog-to-digital converter provided herein includes a capacitor bank comprising a plurality of binary-weighted capacitors, an operational amplifier having an inverting input node, a noninverting input node coupled to analog ground, and an output node, a reset switch, and an input switch. The reset switch is located between the capacitor bank and the operational amplifier, and it selectively couples the capacitor bank to the inverting input node. The input switch has its common terminal coupled to the capacitor bank, and the input switch selectively couples the capacitor bank to either an analog input voltage, a floating terminal, or analog ground. The capacitor bank includes N binary-weighted capacitors and one balacing capacitor that has a unit capacitance. During operation, the analog-to-digital converter generates an N-bit digital output and one polarity bit from the analog input voltage.Type: ApplicationFiled: January 28, 2009Publication date: July 29, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Ashish Khanna, Sung Jin Jo
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Patent number: 6995183Abstract: Compounds are provided having the formula (I) wherein: n is 0, 1 or 2; m is 0, 1 or 2; the sum of n+m less then or equal to 2; the dashed bonds forming a cyclopropyl ring can only be present when Y is CH; X is H or CN; Y is CH, CH2, CHF, CF2, O, S, SO, or SO2; and A is adamantyl. Further provided are methods of using such compounds for the treatment of diabetes and related diseases, and to pharmaceutical compositions containing such compounds.Type: GrantFiled: July 27, 2004Date of Patent: February 7, 2006Assignee: Bristol Myers Squibb CompanyInventors: Lawrence G. Hamann, Ashish Khanna, Mark S. Kirby, David R. Magnin, Ligaya M. Simpkins, James C. Sutton, Jeffrey Robl
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Publication number: 20050239839Abstract: Compounds are provided having the formula (I) wherein: n is 0, 1 or 2; m is 0, 1 or 2; the sum of n+m less then or equal to 2; the dashed bonds forming a cyclopropyl ring can only be present when Y is CH; X is H or CN; Y is CH, CH2, CHF, CF2, O, S, SO, or SO2; and A is adamantyl. Further provided are methods of using such compounds for the treatment of diabetes and related diseases, and to pharmaceutical compositions containing such compounds.Type: ApplicationFiled: June 9, 2005Publication date: October 27, 2005Inventors: Lawrence Hamann, Ashish Khanna, Mark Kirby, David Magnin, Ligaya Simpkins, James Sutton, Jeffrey Robl
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Publication number: 20050228021Abstract: Compounds are provided having the formula (I) wherein: n is 0, 1 or 2; m is 0, 1 or 2; the sum of n+m less then or equal to 2; the dashed bonds forming a cyclopropyl ring can only be present when Y is CH; X is H or CN; Y is CH, CH2, CHF, CF2, O, S, SO, or SO2; and A is adamantyl. Further provided are methods of using such compounds for the treatment of diabetes and related diseases, and to pharmaceutical compositions containing such compounds.Type: ApplicationFiled: June 9, 2005Publication date: October 13, 2005Inventors: Lawrence Hamann, Ashish Khanna, Mark Kirby, David Magnin, Ligaya Simpkins, James Sutton, Jeffrey Robl
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Publication number: 20050038020Abstract: Compounds are provided having the formula (I) wherein: n is 0, 1 or 2; m is 0, 1 or 2; the sum of n+m less then or equal to 2; the dashed bonds forming a cyclopropyl ring can only be present when Y is CH; X is H or CN; Y is CH, CH2, CHF, CF2, O, S, SO, or SO2; and A is adamantyl. Further provided are methods of using such compounds for the treatment of diabetes and related diseases, and to pharmaceutical compositions containing such compounds.Type: ApplicationFiled: July 27, 2004Publication date: February 17, 2005Inventors: Lawrence Hamann, Ashish Khanna, Mark Kirby, David Magnin, Ligaya Simpkins, James Sutton, Jeffrey Robl