Abstract: A system for rapid deployment of content on a common publication platform. The system includes a rapid content deployment application hosted on a stand-alone or networked computer that is interfaced with the common publication platform. The rapid content deployment application includes a receiver to receive a file for publication on the common publication platform, a file existence checker to verify existence of a collaboration file on the common publication platform compatible with the received file, and a file preparer to prepare the received file for uploading to the common publication platform in compliance with one or more of governance, security, and change management policies including access control and authorization policies. The rapid content deployment application further includes a file uploader to upload the prepared file to the common publication platform for publication.

Abstract: Systems and methods for optimizing allocation of configuration elements in a service engagement. A plurality of Service Level Agreements (SLAs) corresponding to a service engagement is received. A Service Level Agreement (SLA) of the plurality of Service Level Agreements (SLAs) includes a plurality of configuration elements and a plurality of SLA compliances. A model is created by allocating a subset of the plurality of configuration elements to meet the SLA. The model is simulated to verify the plurality of SLA compliances being met by the subset allotted. Based on the simulation, a time series data indicating behavior of the model is obtained. The model is optimized to obtain an optimal allocation of the plurality of configuration elements. The model is optimized by allocating another subset of the plurality of configuration elements to meet the SLA.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to selective shallow trench isolation (STI) fill material for stress engineering in semiconductor structures and methods of manufacture. The structure includes a single diffusion break (SDB) region having at least one shallow trench isolation (STI) region with a stress fill material within a recess of the at least one STI region. The stress fill material imparts a stress on a gate structure adjacent to the at least one STI region.

Abstract: A system for rapid deployment of content on a common publication platform. The system includes a rapid content deployment application hosted on a stand-alone or networked computer that is interfaced with the common publication platform. The rapid content deployment application includes a receiver to receive a file for publication on the common publication platform, a file existence checker to verify existence of a collaboration file on the common publication platform compatible with the received file, and a file preparer to prepare the received file for uploading to the common publication platform in compliance with one or more of governance, security, and change management policies including access control and authorization policies. The rapid content deployment application further includes a file uploader to upload the prepared file to the common publication platform for publication.

Abstract: A method of manufacturing a semiconductor device includes the formation of an oxide spacer layer to modify the critical dimension of a gate cut opening in connection with a replacement metal gate process. The oxide spacer layer is deposited after etching a gate cut opening in an overlying hard mask such that the oxide spacer layer is deposited onto sidewall surfaces of the hard mask within the opening and directly over the top surface of a sacrificial gate. The oxide spacer may also be deposited into recessed regions within an interlayer dielectric located adjacent to the sacrificial gate. By filling the recessed regions with an oxide, the opening of trenches through the oxide spacer layer and the interlayer dielectric to expose source/drain junctions can be simplified.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to selective shallow trench isolation (STI) fill material for stress engineering in semiconductor structures and methods of manufacture. The structure includes a single diffusion break (SDB) region having at least one shallow trench isolation (STI) region with a stress fill material within a recess of the at least one STI region. The stress fill material imparts a stress on a gate structure adjacent to the at least one STI region.

Abstract: A shallow trench isolation (STI) structure is formed from a conventional STI trench structure formed of first dielectric material extending into the substrate. The conventional STI structure undergoes further processing, including removing a first portion of the dielectric material and adjacent portions of the semiconductor substrate to create a first recess, and then removing another portion of the dielectric material to create a second recess in just the dielectric material. A nitride layer is formed above remaining dielectric material and on the sidewalls of the substrate. A second dielectric material is formed on the spacer layer and fills the remainder of first and second recesses. The nitride layer provides an “inner spacer” between the first insulating material and the second insulating material and also separates the substrate from the second insulating material.

Abstract: A shallow trench isolation (STI) structure is formed from a conventional STI trench structure formed of first dielectric material extending into the substrate. The conventional STI structure undergoes further processing, including removing a first portion of the dielectric material and adjacent portions of the semiconductor substrate to create a first recess, and then removing another portion of the dielectric material to create a second recess in just the dielectric material. A nitride layer is formed above remaining dielectric material and on the sidewalls of the substrate. A second dielectric material is formed on the spacer layer and fills the remainder of first and second recesses. The nitride layer provides an “inner spacer” between the first insulating material and the second insulating material and also separates the substrate from the second insulating material.

Abstract: A method of manufacturing a semiconductor device includes the formation of an oxide spacer layer to modify the critical dimension of a gate cut opening in connection with a replacement metal gate process. The oxide spacer layer is deposited after etching a gate cut opening in an overlying hard mask such that the oxide spacer layer is deposited onto sidewall surfaces of the hard mask within the opening and directly over the top surface of a sacrificial gate. The oxide spacer may also be deposited into recessed regions within an interlayer dielectric located adjacent to the sacrificial gate. By filling the recessed regions with an oxide, the opening of trenches through the oxide spacer layer and the interlayer dielectric to expose source/drain junctions can be simplified.

Abstract: Methods of forming a sacrificial gate cap and a self-aligned contact for a device structure. A gate electrode is arranged between a first sidewall spacer and a second sidewall spacer. A top surface of the gate electrode is recessed to open a space above the top surface of the recessed gate electrode that partially exposes the first and second sidewall spacers. Respective sections of the first and second sidewall spacers, which are arranged above the top surface of the recessed gate electrode, are removed in order to increase a width of the space. A sacrificial cap is formed in the widened space.

Abstract: A cleaning composition for sanitizing and/or disinfecting hard surfaces, comprising: a cationic biocide, surfactant and low levels of VOC solvents. The cleaning composition is adapted to clean a variety of hard surfaces without leaving behind a visible residue and creates low levels of streaking and filming on the treated surface. The cleaning composition contains less than 5% by weight of VOCs. The cleaning composition may be used alone as a liquid or spray formulation or in combination with a substrate, for example, a pre-loaded cleaning wipe.

Abstract: A system and method for selecting an optimal policy to be implemented in production support engagement. The system configures a knowledge base including plurality of policies, reference events, and reference scenarios. The plurality of policies is mapped with the plurality of reference scenarios and the plurality of reference events. The plurality of policies is defined in a plurality of layers in a manner that each policy corresponds to a particular layer of the plurality of layers. Relevant policies, out of the plurality of policies, may be selected based on an event received. Simulation may be performed on the relevant policies for identifying first candidate policy. The optimization may be performed on the relevant policies for identifying second candidate policy. The first and second candidate policy indicate the optimal policy to be implemented in the production support engagement.

Abstract: A method of removing RMG sidewall layers, and the resulting device are provided. Embodiments include forming a TiN layer in nFET and pFET RMG trenches; forming an a-Si layer over the TiN layer; implanting O2 vertically in the a-Si layer; removing the a-Si layer and TiN layer from the side surfaces of the RMG trenches followed by the a-Si layer from the bottom surfaces; forming a TiN layer in the RMG trenches; forming a a-Si layer over the TiN layer; implanting O2 vertically in the a-Si layer; removing the a-Si layer and TiN layer from the side surfaces of the RMG trenches, the a-Si layer from the bottom surfaces, and a remainder of the TiN layer from only the nFET RMG trench; forming a Ti layer in the RMG trenches; implanting Al or C in the Ti layer vertically and annealing; and filling the RMG trenches with Al or W.

Abstract: Methods of fabricating transistors having raised active region(s) with at least partially angled upper surfaces are provided. The method includes, for instance: providing a gate structure disposed over a substrate, the gate structure including a conformal spacer layer; forming a raised active region adjoining a sidewall of the conformal spacer layer; providing a protective material over the raised active region; selectively etching-back the sidewall of the conformal spacer layer, exposing a side portion of the raised active region below the protective material; and etching the exposed side portion of the raised active region to partially undercut the protective material, wherein the etching facilitates defining, at least in part, an at least partially angled upper surface of the raised active region of the transistor.

Abstract: Methods and systems for dynamically synchronizing a data item between at least one first device and at least one second device are provided. The method includes identifying a change in the at least one data item in the at least one first device, where each of the at least one data item can be associated with the at least one second device. Further, the method includes creating a data set including the changed at least one data item separately for each of the at least one second device associated with the at least one changed data item, and transferring the data set to the at least one second device without receiving any request message from the at least second device.

Abstract: Methods for controlling the length of a replacement metal gate to a designed target gate length and the resulting device are disclosed. Embodiments may include removing a dummy gate from above a substrate forming a cavity, wherein side surfaces of the cavity are lined with an oxidized spacer layer and a bottom surface of the cavity is lined with a gate oxide layer, conformally forming a sacrificial oxide layer over the substrate and the cavity, and removing the sacrificial oxide layer from the bottom surface of the cavity and the substrate leaving sacrificial oxide spacers lining the side surfaces of the cavity.

Abstract: Systems and methods for obtaining an optimal pricing strategy in a service engagement are disclosed. A model is created for the service engagement between a client and vendor. For the service engagement, a pricing strategy is selected. The pricing strategy is selected from one of a fixed strategy, a variable strategy and a combination thereof. Subsequent to selecting the pricing strategy, a client payoff associated with the client and a vendor payoff associated with the vendor are computed. The model is simulated to obtain a time series data. Based on the simulation, an optimal pricing strategy is obtained by calculating an optimizer payoff function. The optimizer payoff function is calculated by assigning relative weights to the client payoff and the vendor payoff. The optimal pricing strategy is obtained by altering the pricing strategy to maximize the optimizer payoff function.

Abstract: Systems and methods for optimizing allocation of configuration elements in a service engagement. A plurality of Service Level Agreements (SLAs) corresponding to a service engagement is received. A Service Level Agreement (SLA) of the plurality of Service Level Agreements (SLAs) includes a plurality of configuration elements and a plurality of SLA compliances. A model is created by allocating a subset of the plurality of configuration elements to meet the SLA. The model is simulated to verify the plurality of SLA compliances being met by the subset allotted. Based on the simulation, a time series data indicating behavior of the model is obtained. The model is optimized to obtain an optimal allocation of the plurality of configuration elements. The model is optimized by allocating another subset of the plurality of configuration elements to meet the SLA.

Abstract: A system and method for selecting an optimal policy to be implemented in production support engagement. The system configures a knowledge base including plurality of policies, reference events, and reference scenarios. The plurality of policies is mapped with the plurality of reference scenarios and the plurality of reference events. The plurality of policies is defined in a plurality of layers in a manner that each policy corresponds to a particular layer of the plurality of layers. Relevant policies, out of the plurality of policies, may be selected based on an event received. Simulation may be performed on the relevant policies for identifying first candidate policy. The optimization may be performed on the relevant policies for identifying second candidate policy. The first and second candidate policy indicate the optimal policy to be implemented in the production support engagement.

Abstract: A cleaning composition for sanitizing and/or disinfecting hard surfaces, comprising: a cationic biocide, surfactant and low levels of VOC solvents. The cleaning composition is adapted to clean a variety of hard surfaces without leaving behind a visible residue and creates low levels of streaking and filming on the treated surface. The cleaning composition contains less than 5% by weight of VOCs. The cleaning composition may be used alone as a liquid or spray formulation or in combination with a substrate, for example, a pre-loaded cleaning wipe.