Patents by Inventor Ashish Kumar

Ashish Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6894541
    Abstract: A sense amplifier includes a feedback controlled bit line access scheme that feeds a sense amplifier output signal back to control operation of its associated bit line access transistor. This feedback may be implemented using a pair of inverter circuits each coupling a respective output signal to the control gate of the associated access transistor. Alternatively, the feedback may be implement using a logic gate which logically combines the sense amplifier output signals together to generate an output signal for controlling operation of both access transistors. The logic gate is preferably a NAND gate. The sense amplifier further includes a cross-connected feedback inversion circuit which inverts a sense amplifier output signal from a first latch inverter for application to a conducting line of a second latch inverter.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: May 17, 2005
    Assignee: STMicroelectronics Pvt. Ltd.
    Inventors: Vivek Nautiyal, Ashish Kumar
  • Publication number: 20040239368
    Abstract: A method and system for reducing power consumption in digital circuits using charge redistribution, comprising a plurality of signal lines, an intermediate floating virtual source/sink, and a charge redistribution circuit connected to each said signal line that isolates said line from its source and connects it to the intermediate floating virtual source/sink during an idle period prior to a change of state.
    Type: Application
    Filed: January 30, 2004
    Publication date: December 2, 2004
    Applicant: STMICROELECTRONICS PVT. LTD.
    Inventors: Vivek Nautiyal, Ashish Kumar
  • Patent number: 6794906
    Abstract: An improved multi-stage binary hierarchy decoder characterized in that at least one of the decoding stages subsequent to the first stage is implemented as a Transmission Gate Matrix (TGM) in which a single transmission gate enables an active input from the previous stage to its output, thereby resulting in reduced area requirements when implemented as an integrated circuit.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: September 21, 2004
    Assignee: STMicroelectronics Pvt. Ltd.
    Inventors: Ashish Kumar Goel, Manish Agarwal
  • Patent number: 6777080
    Abstract: Pressure sensitive adhesive compositions and pressure sensitive adhesive articles containing the adhesive compositions are disclosed. The adhesive compositions of the invention generally demonstrate favorable cohesive strength at elevated temperatures. The adhesive compositions contain an acrylic acid ester copolymer having pendant styrenic polymeric moieties mixed with a polyarylene oxide polymer. The adhesive composition may be a foam.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: August 17, 2004
    Assignee: 3M Innovative Properties Company
    Inventors: Ashish Kumar Khandpur, Mark David Gehlsen, Kenneth Jason Hanley, John James Stradinger, Patrick Jay Fischer
  • Publication number: 20040153923
    Abstract: An improved method and apparatus for reloading frames in which errors are detected during the Programmable Logic Device configuration. A configuration data frame for a FPGA is loaded to the Frame register of the FPGA and also to an error detection circuit which detects errors with the loaded frame. An error counter value is maintained by the apparatus and is incremented each time an error with a frame is detected. The incremented value is compared by a Comparator circuit with a pre-determined threshold value ‘n’. If a match is found then the configuration process is aborted, else the data frame is reloaded in the configuration memory, transferred again to the frame register and rechecked for errors. If no error is detected with the reloaded frame, the error counter value is reset and the next frame is loaded until the FPGA configuration process is over.
    Type: Application
    Filed: September 18, 2003
    Publication date: August 5, 2004
    Applicant: STMicroelectronics Pvt, Ltd.
    Inventors: Ashish Kumar Goel, Namerita Khanna, Davinder Aggarwal
  • Publication number: 20040130353
    Abstract: A sense amplifier includes a feedback controlled bit line access scheme that feeds a sense amplifier output signal back to control operation of its associated bit line access transistor. This feedback may be implemented using a pair of inverter circuits each coupling a respective output signal to the control gate of the associated access transistor. Alternatively, the feedback may be implement using a logic gate which logically combines the sense amplifier output signals together to generate an output signal for controlling operation of both access transistors. The logic gate is preferably a NAND gate. The sense amplifier further includes a cross-connected feedback inversion circuit which inverts a sense amplifier output signal from a first latch inverter for application to a conducting line of a second latch inverter.
    Type: Application
    Filed: October 10, 2003
    Publication date: July 8, 2004
    Inventors: Vivek Nautiyal, Ashish Kumar
  • Publication number: 20040070424
    Abstract: An improved multi-stage binary hierarchy decoder characterized in that at least one of the decoding stages subsequent to the first stage is implemented as a Transmission Gate Matrix (TGM) in which a single transmission gate enables an active input from the previous stage to its output, thereby resulting in reduced area requirements when implemented as an integrated circuit.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 15, 2004
    Inventors: Ashish Kumar Goel, Manish Agarwal
  • Publication number: 20040022111
    Abstract: An improved multi-wordline memory architecture providing decreased bitline coupling to increase speed and reduce power consumption including an interleaving arrangement for connecting adjacent bitcells to different wordlines, coupled to a multiplexing arrangement for sharing bitlines of adjacent bitcells.
    Type: Application
    Filed: April 29, 2003
    Publication date: February 5, 2004
    Inventors: Vivek Nautiyal, Ashish Kumar
  • Publication number: 20040002954
    Abstract: Relational database applications such as index selection, histogram tuning, approximate query processing, and statistics selection have recognized the importance of leveraging workloads. Often these applications are presented with large workloads, i.e., a set of SQL DML statements, as input. A key factor affecting the scalability of such applications is the size of the workload. The invention concerns workload compression which helps improve the scalability of such applications. The exemplary embodiment is broadly applicable to a variety of workload-driven applications, while allowing for incorporation of application specific knowledge. The process is described in detail in the context of two workload-driven applications: index selection and approximate query processing.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 1, 2004
    Inventors: Surajit Chaudhuri, Ashish Kumar Gupta, Vivek Narasayya, Sanjay Agrawal
  • Publication number: 20030190468
    Abstract: Pressure sensitive adhesive compositions and pressure sensitive adhesive articles containing the adhesive compositions are disclosed. The adhesive compositions of the invention generally demonstrate favorable cohesive strength at elevated temperatures. The adhesive compositions contain an acrylic acid ester copolymer having pendant styrenic polymeric moieties mixed with a polyarylene oxide polymer. The adhesive composition may be a foam.
    Type: Application
    Filed: April 4, 2002
    Publication date: October 9, 2003
    Applicant: 3M Innovative Properties Company
    Inventors: Ashish Kumar Khandpur, Mark David Gehlsen, Kenneth Jason Hanley, John James Stradinger, Patrick Jay Fischer
  • Patent number: 6611834
    Abstract: A user at a client machine can customize components of a database search performed at a server. The user does this by sending executable code to the database server. Software code runs as middleware on the database server machine to communicate between the database server and the client and performs the functions of supplying the client with vital information required for generating code which will be used for customizing various processes of the database retrieval session. Typically, the server comprises a set of database servers and the middleware runs on each database server machine to communicate between the database servers and the client. The middleware provides a virtual machine on which the user-supplied code written in a virtual machine language is executed, giving a uniform interface across the set of database servers on which the same user-supplied code will be executed ensuring that the user-supplied code executes under database server specified access privileges.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: August 26, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gaurav Aggarwal, Deepavan Chakrabarti, Pradeep Kumar Dubey, Nitin Punamkumar Garq, Sugata Ghosal, Ashish Kumar Gupta, Ashutosh Kulshreshtha, Sreerama Kolluru Venkata Murthy
  • Publication number: 20030145193
    Abstract: A system and method for enabling rapid partial configuration of reconfigurable devices, wherein configuration definition means define partial configuration requirements, and contain at least a starting address of configuration data for the partial reconfiguration, data size specifying the number of contiguous locations to be reconfigured, and desired configuration data corresponding to the contiguous locations. Configuration loading means provides for loading the configuration data into the reconfigurable device according to the partial configuration requirements.
    Type: Application
    Filed: December 13, 2002
    Publication date: July 31, 2003
    Applicant: STMicroelectronics Pvt. Ltd.
    Inventors: Ashish Kumar Goel, Manish Agarwal
  • Patent number: 6537659
    Abstract: Thermosettable PSA compositions of the invention comprise a major proportion of the adhesive component of at least one acidic polymer and at least one amine-containing compound capable of reacting with acidic functional groups on the acidic polymer to cure the thermosettable PSA composition into a thermoset adhesive. The thermosettable PSA compositions are particularly useful for forming semi-structural or structural bonds. Thermoset adhesives therefrom and methods of forming the thermoset adhesives are also disclosed.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: March 25, 2003
    Assignee: 3M Innovative Properties Company
    Inventors: Naimul Karim, Ashish Kumar Khandpur, Dmitriy Salnikov
  • Publication number: 20010007003
    Abstract: Thermosettable PSA compositions of the invention comprise a major proportion of the adhesive component of at least one acidic polymer and at least one amine-containing compound capable of reacting with acidic functional groups on the acidic polymer to cure the thermosettable PSA composition into a thermoset adhesive. The thermosettable PSA compositions are particularly useful for forming semi-structural or structural bonds. Thermoset adhesives therefrom and methods of forming the thermoset adhesives are also disclosed.
    Type: Application
    Filed: December 20, 2000
    Publication date: July 5, 2001
    Applicant: 3M Innovative Properties Company
    Inventors: Naimul Karim, Ashish Kumar Khandpur, Dmitriy Salnikov