Patents by Inventor Ashish Shrivastava

Ashish Shrivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10042773
    Abstract: Systems and techniques for advance cache allocation are described. A described technique includes selecting a job from a plurality of jobs; selecting a processor core from a plurality of processor cores to execute the selected job; receiving a message which describes future memory accesses that will be generated by the selected job; generating a memory burst request based on the message; performing the memory burst request to load data from a memory to at least a dedicated portion of a cache, the cache corresponding to the selected processor core; and starting the selected job on the selected processor core. The technique can include performing an action indicated by a send message to write one or more values from another dedicated portion of the cache to the memory.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: August 7, 2018
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Sushma Wokhlu, Lee McFearin, Alan Gatherer, Ashish Shrivastava, Peter Yifey Yan
  • Publication number: 20170270674
    Abstract: A system and method for training a computer-implemented object classifier includes detecting a foreground visual object within a sub-region of a scene, determining a background model of the sub-region of the scene, the background model representing the sub-region when any foreground visual object is absent from that sub-region, and training the object classifier by computer-implemented machine learning using the background model of the sub-region as a negative training example.
    Type: Application
    Filed: March 14, 2017
    Publication date: September 21, 2017
    Applicant: Avigilon Corporation
    Inventor: Ashish Shrivastava
  • Patent number: 9734558
    Abstract: A method generates a high-resolution (HR) image from a low-resolution (LR) image using regression functions. During a training stage, training HR images are downsampled to LR images. A signature is determined for each LR-HR patch pair based on a local ternary pattern (LTP). The signature is a low dimensional descriptor used as an abstraction of the patch pair features. Then, patch pairs with the same signature are clustered, and a regression function which maps the LR patches to the HR patches is determined. In some cases patch pairs of similar signatures can be combined for learning and a single regression function determined, thus decreasing the number of required regression functions. During actual upscaling, LR patches of an input image are similarly processed to obtain the signatures and from the regression functions. The LR patches can then be upscaled using the training regression functions.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: August 15, 2017
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Fatih Porikli, Ashish Shrivastava, Jay Thornton
  • Publication number: 20170031829
    Abstract: Systems and techniques for advance cache allocation are described. A described technique includes selecting a job from a plurality of jobs; selecting a processor core from a plurality of processor cores to execute the selected job; receiving a message which describes future memory accesses that will be generated by the selected job; generating a memory burst request based on the message; performing the memory burst request to load data from a memory to at least a dedicated portion of a cache, the cache corresponding to the selected processor core; and starting the selected job on the selected processor core. The technique can include performing an action indicated by a send message to write one or more values from another dedicated portion of the cache to the memory.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 2, 2017
    Inventors: Sushma Wokhlu, Lee McFearin, Alan Gatherer, Ashish Shrivastava, Peter Yifey Yan
  • Publication number: 20150269708
    Abstract: A method generates a high-resolution (HR) image from a low-resolution (LR) image using regression functions. During a training stage, training HR images are downsampled to LR images. A signature is determined for each LR-HR patch pair based on a local ternary pattern (LTP). The signature is a low dimensional descriptor used as an abstraction of the patch pair features. Then, patch pairs with the same signature are clustered, and a regression function which maps the LR patches to the HR patches is determined. In some cases patch pairs of similar signatures can be combined for learning and a single regression function determined, thus decreasing the number of required regression functions. During actual upscaling, LR patches of an input image are similarly processed to obtain the signatures and from the regression functions. The LR patches can then be upscaled using the training regression functions.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 24, 2015
    Applicant: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Fatih Porikli, Ashish Shrivastava, Jay Thornton
  • Publication number: 20150154024
    Abstract: A Very Long Instruction Word (VLIW) digital signal processor particularly adapted for single instruction multiple data (SIMD) operation on various operand widths and data sizes. A vector compare instruction compares first and second operands and stores compare bits. A companion vector conditional instruction performs conditional operations based upon the state of a corresponding predicate data register bit. A predicate unit performs data processing operations on data in at least one predicate data register including unary operations and binary operations. The predicate unit may also transfer data between a general data register file and the predicate data register file.
    Type: Application
    Filed: July 9, 2014
    Publication date: June 4, 2015
    Inventors: Timothy David Anderson, Duc Quang Bui, Mujibur Rahman, Joseph Raymond Michael Zbiciak, Eric Biscondi, Peter Dent, Jelena Milanovic, Ashish Shrivastava