Patents by Inventor Ashish Singla

Ashish Singla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220405499
    Abstract: A method and computing apparatus for extracting information from a document are provided. The method includes receiving a document, extracting data from the document, assigning the document to a category from among a predetermined plurality of categories based on a result of the extracted data, and generating a structured output by formatting the extracted data based on the assigned category.
    Type: Application
    Filed: August 31, 2021
    Publication date: December 22, 2022
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Vrajesh Ricky AMIN, Ashish SINGLA, Samantha ZUCKER, Dana Marie NIBLACK, Stephen MUSACCHIA, Lawrence FATA, Albert NACLERIO, Hozefa Shabbir ZARIWALA, Anirudh HEGDE, Yasser THAMBY, Saquib AHMAD
  • Patent number: 11231883
    Abstract: A memory device includes logic to detect the last page written in multi-plane non-volatile memory. The device includes a memory array, and a storage controller. The memory array includes multiple planes and multiple word lines operable on the memory array. The storage controller is configured to divide the word lines into contiguous sub-ranges and assign a subset of the word lines to boundaries of the sub-ranges. Each word line of the subset of word lines is assigned to a page in a different one of the memory planes. The controller operates the subset of word lines to sense a page programmed or erased state from each of the memory planes in parallel.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: January 25, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ankit Vijay Naghate, Rakshit Tikoo, Yogendra Singh Sikarwar, Ashish Singla, Arun Thandapani, Lee M Gavens
  • Publication number: 20220004336
    Abstract: A memory device includes logic to detect the last page written in multi-plane non-volatile memory. The device includes a memory array, and a storage controller. The memory array includes multiple planes and multiple word lines operable on the memory array. The storage controller is configured to divide the word lines into contiguous sub-ranges and assign a subset of the word lines to boundaries of the sub-ranges. Each word line of the subset of word lines is assigned to a page in a different one of the memory planes. The controller operates the subset of word lines to sense a page programmed or erased state from each of the memory planes in parallel.
    Type: Application
    Filed: July 2, 2020
    Publication date: January 6, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Ankit Vijay Naghate, Rakshit Tikoo, Yogendra Singh Sikarwar, Ashish Singla, Arun Thandapani, Lee M. Gavens