Abstract: A system is disclosed for facilitating operation of a peripheral bus, such as a PCI bus, that operates at multiple clock speeds. The system includes an expansion slot controller that identifies the number of peripheral devices that have been installed in the expansion slots, and further determines whether these devices support high speed operation. The expansion slots transmit a signal indicating the presence of a peripheral device in the slot, and also transmit a signal indicating whether the device is operable at the higher clock frequency. Once the expansion slot controller determines this information, it decides whether operation at the higher frequency is supported by the peripheral devices and by the bus bridge. The expansion slot controller informs each peripheral device of what the operating frequency will be, and transmits a signal to the PCI bus bridge indicating if high frequency operation will be supported.