Patents by Inventor Ashok Khandelwal

Ashok Khandelwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for testing a dual mode interface
    Patent number: 7657799
    Abstract: Disclosed is a system and method for testing a dual mode interface. The dual mode interface includes a first strobe circuit and a second strobe circuit configured to be inoperable during a first operational mode of the interface and operable during a second operational mode of the interface. The dual mode interface also includes a first data circuit and a second data circuit configured to be operable during the first operational mode and the second operational mode. The dual mode interface also includes a signal line connecting an output of the second strobe circuit with an input of the first strobe circuit and a switch element configured to activate said signal line in response to receipt of a test signal.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: February 2, 2010
    Assignee: Agere Systems, Inc.
    Inventors: Yasser Ahmed, Robert Joseph Kapuschinsky, Ashok Khandelwal, Samuel Khoo, Lane A. Smith
  • Method and apparatus for testing a dual mode interface
    Publication number: 20080010552
    Abstract: Disclosed is a system and method for testing a dual mode interface. The dual mode interface includes a first strobe circuit and a second strobe circuit configured to be operable during a first operational mode and inoperable during a second operational mode. The dual mode interface also includes a first data circuit and a second data circuit configured to be operable during the first operational mode and the second operational mode. The dual mode interface also includes a signal line connecting an output of the second strobe circuit with an input of the first strobe circuit and a switch element configured to activate said signal line in response to receipt of a test signal.
    Type: Application
    Filed: May 4, 2006
    Publication date: January 10, 2008
    Inventors: Yasser Ahmed, Robert Kapuschinsky, Ashok Khandelwal, Samuel Khoo, Lane Smith