Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract: A timing recovery loop includes a random walk filter counter for counting early, nominal and late arrivals of data transitions pulses of an input baseband signal waveform encoding a digital bit stream, and provides magnitude counts that are compared to a threshold value that when exceeded by the magnitude counts results in a delay adjustment of the generated adjusted timing pulses then remaining synchronized with the actual bit timing for maintaining bit timing lock. The adjusted timing pulses can then be used by a data detector for reliable data detection and reconstruction of the digital bit stream. The threshold value can be adaptively adjusted for reducing drop lock rates in the presence of changing channel environments.

Abstract: Fluid storage and dispensing system comprising a pressure vessel having a moveable partition member dividing the interior into first and second variable volumes. The first variable volume has a first passage adapted for the inflow and outflow of a product fluid and the second variable volume has a second passage adapted for the inflow and outflow of a compensating gas. The system includes (1) a compensating gas line for providing compensating gas, (2) a first orifice that is installed in the compensating gas line and has an upstream side and a downstream side, (3) a compensating gas vent line connected to the compensating gas line between the second passage and the downstream side of the first orifice, and (4) a second orifice installed in the compensating gas vent line, wherein the cross-sectional flow area of the second orifice is smaller than the cross-sectional flow area of the first orifice.

Abstract: A propeller type fluid mixing apparatus for inducing the flow of a fluid into a liquid being treated by the rotation of a propeller in the liquid comprising a drive shaft supported for rotary motion about its axis having first and second ends; motor connected to a first end of said drive shaft for rotating said drive shaft; a propeller attached to a second end of said drive shaft whereby the rotation of said drive shaft rotates said propeller and induces a flow of the liquid in which the propeller is disposed; at least one conduit attached to said housing, said conduit having an inlet portion and an outlet portion; said outlet portion comprises a diffuser ring said diffuser ring being located a distance upstream of said propeller that is no more than 2 times the outside diameter of the propeller and the effective diameter of the diffuser ring is equal to or less than the outside diameter of the propeller; and said inlet portion of said conduit attached to a pressurized source for said fluid.

Abstract: A timing recovery loop includes a random walk filter counter for counting early, nominal and late arrivals of data transitions pulses of an input baseband signal waveform encoding a digital bit stream, and provides magnitude counts that are compared to a threshold value that when exceeded by the magnitude counts results in a delay adjustment of the generated adjusted timing pulses then remaining synchronized with the actual bit timing for maintaining bit timing lock. The adjusted timing pulses can then be used by a data detector for reliable data detection and reconstruction of the digital bit stream. The threshold value can be adaptively adjusted for reducing drop lock rates in the presence of changing channel environments.