Patents by Inventor Ashutosh Kumar
Ashutosh Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12645250Abstract: Aspects of the subject disclosure address the traditional trade-off between performance and area, in relation to circuit and system design, together with power as an additional factor of consideration. Circuits and systems of this disclosure may realize a datapath of data in respect of memory state elements (e.g., registers, flops, etc.) that is dependent on multiple qualifiers. Aspects of this disclosure enhance (e.g., optimize) area and reduce leakage power associated with circuits and systems. Furthermore, aspects of this disclosure enable and enhance an insertion of clock-gating circuits or mechanisms to reduce dynamic-power consumption depending on states of the qualifiers.Type: GrantFiled: July 14, 2023Date of Patent: June 2, 2026Assignee: NXP B.V.Inventors: Sagarkumar Jagdishkumar Patel, Sakshi Sharma, Ashutosh Kumar, Nidhi Puri, Love Gupta
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Patent number: 12646182Abstract: According to an embodiment of the present disclosure, the processing circuitry of the full-body tracking system communicates with various cameras located in the tracking space to acquire image data captured by the cameras. For the acquisition of the image data, a camera that has already been introduced into the tracking space for another purpose. The processing circuitry performs tracking and skeleton estimation for each user in the tracking space using the acquired image data. The processing circuitry authenticates a target user on which full body tracking is performed, and acquires position information and skeleton information of the authenticated target user from the result of the tracking and the skeleton estimation. Then, the processing circuitry reflects the body motion of the target user on the virtual avatar in the XR space using the acquired position information and skeleton information of the target user.Type: GrantFiled: April 24, 2025Date of Patent: June 2, 2026Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Naoya Yoshimura, Hitoshi Kamada, Norimasa Kobori, Hsuan-Kung Yang, Tsu-Ching Hsiao, Daniel Nemcik, Ashutosh Kumar, Betty Magali Claire Le Dem, Ryuya Nishino
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Publication number: 20260128398Abstract: A system for calibrating medical system backup batteries includes a processing device and a memory storage device. The memory storage device includes instructions executable by the processor to receive a shutdown request to shut down a medical system having a backup battery. Additionally, the instructions are executable by the processor to determine, in response to receiving the shutdown request, that the backup battery is due for calibration based on a current date and a calibration due date. Further, the instructions are executable by the processor to provide a request for a fuel gauge board of a power management board for the medical system to perform a discharge of the backup battery.Type: ApplicationFiled: November 7, 2024Publication date: May 7, 2026Applicant: GE Precision Healthcare LLCInventors: Chetankumar A. Modi, Chekkizhar Pandiyan, Hariprasad Kodancha, Ashutosh Kumar
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Patent number: 12591375Abstract: A data storage device (DSD) (1) comprising: a storage medium (13); and at least one flash interface module (FIM) (27), wherein in response to a signal (4) of a switch (3) is configured to selectively transition operation of the DSD (1) between two modes. A confidential mode, in which security data (7) is stored with user data (9) as protected data (11) in the storage medium (13) of the DSD (1) during a write operation (15), and the security data (7) is used to validate subsequent requests to access (17), or modify, the corresponding stored user data (9). A normal mode, in which access to the protected data (11) is prevented.Type: GrantFiled: February 28, 2024Date of Patent: March 31, 2026Assignee: Sandisk Technologies, Inc.Inventors: Ganesh Kumar Pathirakani, Nagarajan Ragupathy, Ashutosh Kumar
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Patent number: 12574024Abstract: An isolation driver circuit for a pulse width modulation signal. The isolation driver circuit includes a rising edge detection circuit, a falling edge detection circuit, and a decoder. The rising edge detection circuit and the falling edge detection circuit respectively detect rising edges and falling edges of the input pulse width modulation signal, and respectively output corresponding rising edge detection signals and falling edge detection signals that are capacitively isolated from the input pulse width modulation signal. The decoder receives the rising edge detection signals and the falling edge detection signals, and outputs respective rising edges and falling edges of an output pulse width modulation signal that temporally align with the respective rising edges and falling edges of the input pulse width modulation signal. Thus, information stored in the pulse widths of the input pulse width modulation signal are preserved with high fidelity in the output pulse width modulation signal.Type: GrantFiled: October 24, 2023Date of Patent: March 10, 2026Assignee: Infineon Technologies Canada Inc.Inventors: Abhishek Jain, Ramesh G. Karpur, Ashutosh Kumar, Suraj Somashekara Kumar, Ashutosh Ravindra Joharapurkar
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Publication number: 20250372246Abstract: A method for controlling medical devices includes receiving a user input to a user control device that is communicatively connected to a first medical device controller, the first medical device controller configured to control a first medical device; transmitting a message associated with the user input from the first medical device controller to a second medical device controller; and controlling, by the second medical device controller, based on the message, a second medical device communicatively connected to the second medical device controller.Type: ApplicationFiled: May 28, 2025Publication date: December 4, 2025Applicant: Stryker CorporationInventors: Ashutosh KUMAR, Gavin Michael MURRAY, Vivian Wing Yan WONG
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Publication number: 20250355784Abstract: Systems and methods for generating system architecture representation by implementing machine learning (ML) techniques are disclosed. The system receives a request for generating system architecture representation from at least one user and generates an architecture summary for the received request. Further, the system determines an architecture pattern relevant to the received request based on a context of the generated architecture summary using the large language models and machine learning (ML) models. The system further generates an architecture code corresponding to the received request. The system validates the generated architecture code for determining errors in the generated architecture code based on compliance-based rules, legal-based rules, and security-based rules specific to an organization using the machine learning (ML) models.Type: ApplicationFiled: May 15, 2024Publication date: November 20, 2025Inventors: Rajendra Prasad TANNIRU, Vijeth Srinivas HEGDE, Ravindra KABBINALE, Santhosh MV, Sreenath KOTHAVOOR, Amrutha Pervody BHAT, Naveen Raj K P, Lakshmi SRINIVASAN, Koushik M VIJAYARAGHAVAN, Harshitha SHETTY, Rajath JAIN, Ashutosh KUMAR
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Publication number: 20250356501Abstract: According to an embodiment of the present disclosure, the processing circuitry of the full-body tracking system communicates with various cameras located in the tracking space to acquire image data captured by the cameras. For the acquisition of the image data, a camera that has already been introduced into the tracking space for another purpose. The processing circuitry performs tracking and skeleton estimation for each user in the tracking space using the acquired image data. The processing circuitry authenticates a target user on which full body tracking is performed, and acquires position information and skeleton information of the authenticated target user from the result of the tracking and the skeleton estimation. Then, the processing circuitry reflects the body motion of the target user on the virtual avatar in the XR space using the acquired position information and skeleton information of the target user.Type: ApplicationFiled: April 24, 2025Publication date: November 20, 2025Inventors: Naoya YOSHIMURA, Hitoshi KAMADA, Norimasa KOBORI, Hsuan-Kung YANG, Tsu-Ching HSIAO, Daniel NEMCIK, Ashutosh KUMAR, Betty Magali Claire LE DEM, Ryuya NISHINO
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Patent number: 12470137Abstract: A circuit that is capable of generating a negative voltage on a negative voltage supply node. The circuit includes a negative voltage generation circuit, an oscillator and an oscillator control signal generator. The negative voltage generation circuit generates a negative voltage on the negative voltage supply node in response to receiving a signal from the oscillator. The negative voltage generated by the negative voltage generation circuit depends upon the frequency of the signal from the oscillator. The oscillator control signal generator controls the frequency of the signal from the oscillator by sensing the negative voltage present on the negative voltage supply node, and by increasing or decreasing the frequency of the signal from the oscillator accordingly. Thus, charge is replenished to the negative voltage supply node to more closely match the drawing of charge from that negative voltage supply node, thereby more accurately generating the negative voltage.Type: GrantFiled: October 24, 2023Date of Patent: November 11, 2025Assignee: Infineon Technologies Canada Inc.Inventors: Ashutosh Kumar, Abhishek Jain, Suraj Somashekara Kumar, Ramesh G. Karpur, Ashutosh Ravindra Joharapurkar, Zhemin Zhang, Yalong Li, Rohan Samsi, Marco A. Zuniga
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Publication number: 20250307408Abstract: Techniques for enhancing security for replacement motherboards are disclosed. In response to a replacement motherboard being installed into a host computing system and being powered on, a service raises a replacement motherboard event flag. The service then detects an attempt to log into an out-of-band management platform of the replacement motherboard. This login involves use of a set of default credentials. In response, the service locks user access to the out-of-band management platform. The service triggers the host computing system to power on. The host computing system then initiates a BIOS boot operation. As a part of that operation, the service provides a user selectable option to restore a previously stored configuration that is usable to configure the replacement motherboard.Type: ApplicationFiled: April 2, 2024Publication date: October 2, 2025Inventors: Mahesh Babu Ramaiah, Farhan Syed, Ashutosh Kumar
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Publication number: 20250272007Abstract: A data storage device (DSD) (1) comprising: a storage medium (13); and at least one flash interface module (FIM) (27), wherein in response to a signal (4) of a switch (3) is configured to selectively transition operation of the DSD (1) between two modes. A confidential mode, in which security data (7) is stored with user data (9) as protected data (11) in the storage medium (13) of the DSD (1) during a write operation (15), and the security data (7) is used to validate subsequent requests to access (17), or modify, the corresponding stored user data (9). A normal mode, in which access to the protected data (11) is prevented.Type: ApplicationFiled: February 28, 2024Publication date: August 28, 2025Applicant: Western Digital Technologies, Inc.Inventors: Ganesh Kumar Pathirakani, Nagarajan Ragupathy, Ashutosh Kumar
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Patent number: 12326964Abstract: Methods and systems for managing configuration of data processing systems are disclosed. Configuration of data processing systems may be managed by limiting connectivity to components of data processing systems and credentialing access for the components. To enable access to components of data processing systems, the operation of the components may be updated for limited durations of time to allow various devices to communicate with these components. While allowed to communicate, the components of the data process system may restrict access to credentialed users.Type: GrantFiled: October 31, 2023Date of Patent: June 10, 2025Assignee: Dell Products L.P.Inventors: Mahesh Babu Ramaiah, Joseph Caisse, Ashutosh Kumar
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Publication number: 20250139295Abstract: Methods and systems for managing configuration of data processing systems are disclosed. Configuration of data processing systems may be managed by limiting connectivity to components of data processing systems and credentialing access for the components. To enable access to components of data processing systems, the operation of the components may be updated for limited durations of time to allow various devices to communicate with these components. While allowed to communicate, the components of the data process system may restrict access to credentialed users.Type: ApplicationFiled: October 31, 2023Publication date: May 1, 2025Inventors: MAHESH BABU RAMAIAH, JOSEPH CAISSE, ASHUTOSH KUMAR
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Publication number: 20250132656Abstract: An isolation driver circuit for a pulse width modulation signal. The isolation driver circuit includes a rising edge detection circuit, a falling edge detection circuit, and a decoder. The rising edge detection circuit and the falling edge detection circuit respectively detect rising edges and falling edges of the input pulse width modulation signal, and respectively output corresponding rising edge detection signals and falling edge detection signals that are capacitively isolated from the input pulse width modulation signal. The decoder receives the rising edge detection signals and the falling edge detection signals, and outputs respective rising edges and falling edges of an output pulse width modulation signal that temporally align with the respective rising edges and falling edges of the input pulse width modulation signal. Thus, information stored in the pulse widths of the input pulse width modulation signal are preserved with high fidelity in the output pulse width modulation signal.Type: ApplicationFiled: October 24, 2023Publication date: April 24, 2025Inventors: Abhishek JAIN, Ramesh G. KARPUR, Ashutosh KUMAR, Suraj Somashekara KUMAR, Ashutosh Ravindra JOHARAPURKAR
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Publication number: 20250132668Abstract: A circuit that is capable of generating a negative voltage on a negative voltage supply node. The circuit includes a negative voltage generation circuit, an oscillator and an oscillator control signal generator. The negative voltage generation circuit generates a negative voltage on the negative voltage supply node in response to receiving a signal from the oscillator. The negative voltage generated by the negative voltage generation circuit depends upon the frequency of the signal from the oscillator. The oscillator control signal generator controls the frequency of the signal from the oscillator by sensing the negative voltage present on the negative voltage supply node, and by increasing or decreasing the frequency of the signal from the oscillator accordingly. Thus, charge is replenished to the negative voltage supply node to more closely match the drawing of charge from that negative voltage supply node, thereby more accurately generating the negative voltage.Type: ApplicationFiled: October 24, 2023Publication date: April 24, 2025Inventors: Ashutosh KUMAR, Abhishek JAIN, Suraj Somashekara KUMAR, Ramesh G. KARPUR, Ashutosh Ravindra JOHARAPURKAR, Zhemin ZHANG, Yalong LI, Rohan SAMSI, Marco A. ZUNIGA
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Publication number: 20240385644Abstract: Aspects of the subject disclosure address the traditional trade-off between performance and area, in relation to circuit and system design, together with power as an additional factor of consideration. Circuits and systems of this disclosure may realize a datapath of data in respect of memory state elements (e.g., registers, flops, etc.) that is dependent on multiple qualifiers. Aspects of this disclosure enhance (e.g., optimize) area and reduce leakage power associated with circuits and systems. Furthermore, aspects of this disclosure enable and enhance an insertion of clock-gating circuits or mechanisms to reduce dynamic-power consumption depending on states of the qualifiers.Type: ApplicationFiled: July 14, 2023Publication date: November 21, 2024Inventors: Sagarkumar Jagdishkumar Patel, Sakshi Sharma, Ashutosh Kumar, Nidhi Puri, Love Gupta
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Publication number: 20230338311Abstract: The present invention is directed to various methods of suppressing inflammasome activation. For example, the present invention relates to various methods of treating a disease or condition in which inflammation contributes to the disease or condition state.Type: ApplicationFiled: January 11, 2021Publication date: October 26, 2023Applicants: Washington University, Senseion Therapeutics, Inc.Inventors: Rajan Sah, Hongzhen Hu, Ashutosh Kumar, Daniel Lerner
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Patent number: 11709379Abstract: A method of assembling an adjustable fluid-filled lens assembly comprising biaxially tensioning an elastomeric membrane to a surface tension of greater than 180 N/m, typically greater than 1000 N/m; thermally conditioning the tensioned membrane, e.g., for one hour at a temperature of about 80° C., to accelerate relaxation of the membrane; mounting the membrane to a peripheral support structure whilst maintaining the tension in the membrane; assembling the mounted membrane with one or more other components to form an enclosure with the membrane forming one wall of the enclosure; and thereafter filling the enclosure with a fluid. The membrane may be formed from an aromatic polyurethane, and the fluid may be a phenylated siloxane. In some embodiments, the membrane is able to hold a substantially constant surface tension of at least 180 N/m for a period of at least 12 months.Type: GrantFiled: November 10, 2020Date of Patent: July 25, 2023Assignee: ADLENS LTDInventors: Robert Edward Stevens, Thomas Jacoby, Derek Paul Forbes Bean, William Guest, Jon Nisper, Tom Worsley, Ashutosh Kumar, Richard Wilhelm Janse Van Rensburg, Peter Lee Crossley, Rita Stella
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Patent number: 11645187Abstract: Methods, systems and computer program products for user-specific curation of applications from heterogeneous application sources. Multiple components are interconnected to perform user-specific curation operations. The user-specific curation operations comprise accessing application metadata corresponding to a plurality of applications from a plurality of application sources. The application sources may be heterogeneous and may be situated at local sites or at remote sites. A set of rules are applied to the application metadata to determine if one or more applications are authorized for use by a particular user or group. Publication attributes that control accessibility by a particular user or particular group of users are associated with the authorized applications. Based on the publication attributes as they apply to a particular user, one or more curated applications are selected from the authorized applications.Type: GrantFiled: February 25, 2021Date of Patent: May 9, 2023Assignee: Nutanix, Inc.Inventors: Mahesh Vinayak Patil, Balaji Janakiram, Pranav Yogesh Gupta, Rohit Jayprakash Girme, Siyu Wei, Vinod Gupta, Aditya Dipankar, Jasnoor Singh Gill, Aaditya Sood, Ashutosh Kumar
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Patent number: 11444902Abstract: A messaging system identifies a received message as a notification message from a conversation system in a media application. The messaging system obtains rendering information to render a current state of the conversation thread represented by the message. The message system renders the current state of the followed conversation thread, with actuators that provide interactive functionality allowing the user to interact with the conversation thread, in the message viewer of the user's messaging system.Type: GrantFiled: October 16, 2020Date of Patent: September 13, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Ravin Sachdeva, Santosh Kumar, Izis de Melo Moreira, Luiz Gustavo Bustamante Magalhaes, Ashutosh Kumar, Xuemin Liu, Humberto Lezama Guadarrama, Yue Ma, Amy Huyen Phuoc Nguyen, Iuliana Chiriac, Fernando Ruben Martinez Ovelar