Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of operating a system-on-chip (SoC). The method includes selecting a CPU core of a plurality of CPU cores of the SoC to boot the SoC based on information indicative of the quality of the plurality of CPU cores stored on the SoC. The method includes running boot code on the selected CPU.

Abstract: Systems and methods are disclosed for providing stack overflow protection on a system on chip via a hardware write-once register. An exemplary embodiment of an system on chip comprises a hardware write-once register, a boot processor, and one or more processor subsystems. The boot processor is configured to execute a read only memory (ROM) image which initializes the hardware write-once register with a first numeric value in response to the system on chip being powered on. The one or more processor subsystems have an associated software image configured to use the first numeric value in the hardware write-once register as a stack canary value to combat stack overflow attacks.

Abstract: Systems and methods are disclosed for providing stack overflow protection on a system on chip via a hardware write-once register. An exemplary embodiment of an system on chip comprises a hardware write-once register, a boot processor, and one or more processor subsystems. The boot processor is configured to execute a read only memory (ROM) image which initializes the hardware write-once register with a first numeric value in response to the system on chip being powered on. The one or more processor subsystems have an associated software image configured to use the first numeric value in the hardware write-once register as a stack canary value to combat stack overflow attacks.

Abstract: Systems, methods, and computer programs are disclosed for securely booting a system on chip. One embodiment is a system comprising a system on chip (SoC) and a virtual collated internal memory pool (VCIMP). The SoC comprises a bootable processing device having a first internal memory, a read only memory (ROM), and one or more bootable processing subsystems each having a dedicated internal memory. The bootable processing device is configured to execute a bootloader in the ROM. The VCIMP provides time-shared control and access to the one or more bootable processing subsystems during execution of a boot sequence. The VCIMP comprises a contiguous logical-to-physical address mapping of the first internal memory residing on the bootable processing device and the dedicated internal memories residing on the corresponding one or more bootable processing subsystems.

Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of operating a system-on-chip (SoC). The method includes selecting a CPU core of a plurality of CPU cores of the SoC to boot the SoC based on information indicative of the quality of the plurality of CPU cores stored on the SoC. The method includes running boot code on the selected CPU.

Abstract: Methods, systems and devices are provided for revising a data image of a read-write memory device. The method includes accessing an initial data image from an initial virtual block corresponding to an actual block of a series of actual blocks of the read-write memory device. The initial data image includes an initial boot loader. Also, a backup data image is stored in a remote virtual block spaced away and following in the series of actual blocks from the initial virtual block. The backup data image includes a backup boot loader. Additionally, the initial data image is erased from the initial virtual block and a replacement data image is stored in the initial virtual block. The initial virtual block may include more than one virtual block spaced away and proceeding in the series of actual blocks from the remote virtual block.