Abstract: According to one embodiment, a transceiver includes: a radio transmitter including a power amplifier; a detector circuit including: a squaring circuit configured to receive an output of the power amplifier of the radio transmitter and configured to produce an output current; and a DC current absorber electrically connected to an output terminal of the squaring circuit.

Abstract: An electronic device and method are provided. The electronic device includes a directional coupler, a sense pair connected to the directional coupler, and an analog-to-digital converter (ADC) connected to the sense pair. The ADC directly digitizes a signal current received from the sense pair.

Abstract: An electronic device and method are provided. The electronic device includes a directional coupler, a sense pair connected to the directional coupler, and an analog-to-digital converter (ADC) connected to the sense pair. The ADC directly digitizes a signal current received from the sense pair.

Abstract: According to one embodiment, a transceiver includes: a radio transmitter including a power amplifier; a detector circuit including: a squaring circuit configured to receive an output of the power amplifier of the radio transmitter and configured to produce an output current; and a DC current absorber electrically connected to an output terminal of the squaring circuit.

Abstract: A detector circuit includes: a squaring circuit configured to receive an output of a power amplifier of a radio transmitter and to produce an output current, the output of the power amplifier including: a desired tone; a local oscillator leakage tone; and an image tone, and the output current of the squaring circuit including: a direct current (DC) component including a function of the desired tone and an alternating current (AC) component; and a DC current absorber electrically connected to an output terminal of the squaring circuit, the DC current absorber being configured to filter out the DC component of the output current of the squaring circuit to produce a filtered output of the squaring circuit, the filtered output including the AC component including functions of the local oscillator leakage tone and the image tone.

Abstract: A detector circuit includes: a squaring circuit configured to receive an output of a power amplifier of a radio transmitter and to produce an output current, the output of the power amplifier including: a desired tone; a local oscillator leakage tone; and an image tone, and the output current of the squaring circuit including: a direct current (DC) component including a function of the desired tone and an alternating current (AC) component; and a DC current absorber electrically connected to an output terminal of the squaring circuit, the DC current absorber being configured to filter out the DC component of the output current of the squaring circuit to produce a filtered output of the squaring circuit, the filtered output including the AC component including functions of the local oscillator leakage tone and the image tone.

Abstract: A detector circuit includes: a squaring circuit configured to receive an output of a power amplifier of a radio transmitter and to produce an output current, the output of the power amplifier including: a desired tone; a local oscillator leakage tone; and an image tone, and the output current of the squaring circuit including: a direct current (DC) component including a function of the desired tone and an alternating current (AC) component; and a DC current absorber electrically connected to an output terminal of the squaring circuit, the DC current absorber being configured to filter out the DC component of the output current of the squaring circuit to produce a filtered output of the squaring circuit, the filtered output including the AC component including functions of the local oscillator leakage tone and the image tone.

Abstract: Apparatuses, systems, and methods for Analog-to-Digital Converters (ADCs) are described. In one aspect, an ADC is described which uses a Flash-assisted ADC and a Successive Approximation Register (SAR) to provide digital approximations of an input analog voltage to a Capacitor Digital-to-Analog Converter (DAC), which generates a voltage from the digital approximations. The two voltages are compared and the comparison value used as the input for the SAR. After successive approximations, a digital combiner generates the digital conversion value from the outputs of the Flash-assisted ADC and the SAR. In one aspect, the bit cycles required for conversion are reduced by using redundancy and recombination.

Abstract: Circuits having corresponding methods and computer-readable media comprise: an amplifier; a crystal port configured to be electrically coupled to a crystal, wherein a first terminal of the crystal port is electrically coupled to an input of the amplifier, and wherein a second terminal of the crystal port is electrically coupled to an output of the amplifier; a first capacitor, wherein a first terminal of the first capacitor is electrically coupled to ground; a second capacitor, wherein a first terminal of the second capacitor is electrically coupled to ground; a first switch configured to selectively electrically couple the input of the amplifier to a second terminal of the first capacitor; and a second switch configured to selectively electrically couple the output of the amplifier to a second terminal of the second capacitor.

Abstract: A voltage regulator including a first, second, and third capacitances, first switches, and second switches. A first terminal of the first capacitance is connected to a first output. The first output is at a first output voltage. A first terminal of the second capacitance is connected to a second output. The second output is at a second output voltage. The first switches connect a first terminal of the third capacitance to a voltage supply, the first output, or the second output. The second switches connect a second terminal of the third capacitance to a reference terminal, the first output, or the second output. The first and second switches are controlled, based on the first output voltage and the second output voltage, to: adjust voltages across the first, second, and third capacitances; maintain the first output at a first predetermined voltage; and maintain the second output at a second predetermined voltage.

Abstract: A voltage regulator including a first, second, and third capacitances, first switches, and second switches. A first terminal of the first capacitance is connected to a first output. The first output is at a first output voltage. A first terminal of the second capacitance is connected to a second output. The second output is at a second output voltage. The first switches connect a first terminal of the third capacitance to a voltage supply, the first output, or the second output. The second switches connect a second terminal of the third capacitance to a reference terminal, the first output, or the second output. The first and second switches are controlled, based on the first output voltage and the second output voltage, to: adjust voltages across the first, second, and third capacitances; maintain the first output at a first predetermined voltage; and maintain the second output at a second predetermined voltage.

Abstract: An apparatus includes a first switch coupled to a first voltage reference and a second switch coupled to a second voltage reference. A third switch is coupled to a first terminal of a first capacitor and a first terminal of a second capacitor. A fourth switch is coupled to a second terminal of the first capacitor and the first terminal of the second capacitor. A fifth switch is coupled to the second terminal of the first capacitor and a first terminal of a third capacitor. A sixth switch is coupled to the first terminal of the first capacitor and the first terminal of the third capacitor. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are controlled to maintain a first voltage level at a first output and a second voltage level at a second output.

Abstract: Circuits having corresponding methods and computer-readable media comprise: an amplifier; a crystal port configured to be electrically coupled to a crystal, wherein a first terminal of the crystal port is electrically coupled to an input of the amplifier, and wherein a second terminal of the crystal port is electrically coupled to an output of the amplifier; a first capacitor, wherein a first terminal of the first capacitor is electrically coupled to ground; a second capacitor, wherein a first terminal of the second capacitor is electrically coupled to ground; a first switch configured to selectively electrically couple the input of the amplifier to a second terminal of the first capacitor; and a second switch configured to selectively electrically couple the output of the amplifier to a second terminal of the second capacitor.

Abstract: An apparatus includes a first switch coupled to a first voltage reference and a second switch coupled to a second voltage reference. A third switch is coupled to a first terminal of a first capacitor and a first terminal of a second capacitor. A fourth switch is coupled to a second terminal of the first capacitor and the first terminal of the second capacitor. A fifth switch is coupled to the second terminal of the first capacitor and a first terminal of a third capacitor. A sixth switch is coupled to the first terminal of the first capacitor and the first terminal of the third capacitor. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are controlled to maintain a first voltage level at a first output and a second voltage level at a second output.