Patents by Inventor Ashwin Alapati
Ashwin Alapati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20260180916Abstract: Packet metadata for incoming packets are buffered in queue selection buffers associated with a port of a network node. Packet data for outgoing packets are buffered in a port selection buffer associated with the port. At a selection clock cycle, while a port scheduler of the network node selects a subset of the packet data for a subset of the outgoing packets from the port selection buffer, a queue scheduler of the port concurrently selects a subset of the packet metadata for a subset of the incoming packets from the queue selection buffers and adds new packet data for new outgoing packets to the port selection buffer of the port. The new packet data are derived based at least in part on the subset of the packet metadata for the subset of the incoming packets.Type: ApplicationFiled: February 20, 2026Publication date: June 25, 2026Inventors: William Brad MATTHEWS, Ashwin ALAPATI
-
Patent number: 12598148Abstract: The present disclosure generally relates to improving the efficiency of a network switching fabric. Some aspects of the present disclosure relate to an apparatus that includes: multiple ports configured to interface with multiple hardware accelerators; multiple multiplexers configured to communicate with the ports via multiple input channels; multiple demultiplexers configured to communicate with the ports via multiple output channels; a first router coupled to the multiplexers and the demultiplexers via a set of header channels, the first router configured to route header portions of one or more messages; and a second router coupled to the multiplexers and the demultiplexers via a set of data channels, the second router configured to route data portions of the one or more messages.Type: GrantFiled: August 11, 2025Date of Patent: April 7, 2026Assignee: Upscale AI, Inc.Inventors: Srinivas Gangam, Ashwin Alapati, Amit Srivastava
-
Patent number: 12587491Abstract: A system with a switching device is presented. The switching device includes first ports which interconnect first processing units in a first group using a first protocol and includes second ports which interconnect the first processing units with second processing units amongst second groups using the first protocol in conjunction with a second protocol. The switching device includes a switching fabric which determines a destination of an incoming data unit. If the destination is determined to be a first processing unit in the first group, the switching fabric forwards the data unit to a first port of the first ports using the first protocol. If the destination is determined to be a second processing unit in a second group of the second groups, the switching fabric forwards the data unit to a second port of the second ports using the first protocol in conjunction with the second protocol.Type: GrantFiled: March 18, 2025Date of Patent: March 24, 2026Assignee: Auradine, Inc.Inventors: Srinivas Gangam, Ashwin Alapati, Amit Srivastava
-
Patent number: 12587486Abstract: Packet metadata for incoming packets are buffered in queue selection buffers associated with a port of a network node. Packet data for outgoing packets are buffered in a port selection buffer associated with the port. At a selection clock cycle, while a port scheduler of the network node selects a subset of the packet data for a subset of the outgoing packets from the port selection buffer, a queue scheduler of the port concurrently selects a subset of the packet metadata for a subset of the incoming packets from the queue selection buffers and adds new packet data for new outgoing packets to the port selection buffer of the port. The new packet data are derived based at least in part on the subset of the packet metadata for the subset of the incoming packets.Type: GrantFiled: July 27, 2023Date of Patent: March 24, 2026Assignee: Marvell Asia Pte, Ltd.Inventors: William Brad Matthews, Ashwin Alapati
-
Publication number: 20250286835Abstract: A network device includes network interfaces, and respective sets of queues. The sets of queues includes a first set corresponding to a first network interface and a second set corresponding to a second network interface. The network device receives packets via network interfaces, and processes packets to determine network interfaces via which the packets are to be transmitted. When the first network interface is not being used by the network device, the network device operates a composite queue to store packets corresponding to the second network interface. The composite queue includes a first queue from the first set and a second queue from the second set. The network device stores packet data to and reads packet data from the composite queue at a rate that is greater than a maximum rate at which the first queue and the second queue are capable of storing and reading packet data.Type: ApplicationFiled: March 7, 2025Publication date: September 11, 2025Inventors: Srinivasan DK, Viraj Milind ATHAVALE, Ashwin ALAPATI, William Brad MATTHEWS, Ajit Kumar JAIN
-
Patent number: 12413535Abstract: A scheduler in a network device serves ports with data units from a plurality of queues. The scheduler implements a scheduling algorithm that is normally constrained to releasing data to a port no more frequently than at a default maximum service rate. However, when data units smaller than a certain size are at the heads of one or more data unit queues assigned to a port, the scheduler may temporarily increase the maximum service rate of that port. The increased service rate permits fuller realization of a port's maximum bandwidth when handling smaller data units. In some embodiments, increasing the service rate involves dequeuing more than one small data unit at a time, with the extra data units temporarily stored in a port FIFO. The scheduler adds a pseudo-port to its scheduling sequence to schedule release of data from the port FIFO, with otherwise minimal impact on the scheduling logic.Type: GrantFiled: October 30, 2023Date of Patent: September 9, 2025Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Ashwin Alapati
-
Publication number: 20250267100Abstract: Techniques as described herein may be implemented to processing ingress packet traffic flows. A memory space that is divided into a packet buffer and an accelerated memory is defined. One or more congestion levels associated with ingress network traffic are determined. Upon enqueuing incoming packets, one or more memory locations are selected in the memory space for storing portions of each of the incoming packets based on at least one of the determined congestion levels.Type: ApplicationFiled: February 20, 2025Publication date: August 21, 2025Inventors: Vijay CHOUGULE, William Brad MATTHEWS, Ashwin ALAPATI
-
Patent number: 12388770Abstract: The present disclosure generally relates to improving the efficiency of a network switching fabric. Some aspects of the present disclosure relate to an apparatus that includes: multiple ports configured to interface with multiple hardware accelerators; multiple multiplexers configured to communicate with the ports via multiple input channels; multiple demultiplexers configured to communicate with the ports via multiple output channels; a first router coupled to the multiplexers and the demultiplexers via a set of header channels, the first router configured to route header portions of one or more messages; and a second router coupled to the multiplexers and the demultiplexers via a set of data channels, the second router configured to route data portions of the one or more messages.Type: GrantFiled: April 23, 2025Date of Patent: August 12, 2025Assignee: Auradine, Inc.Inventors: Srinivas Gangam, Ashwin Alapati, Amit Srivastava
-
Publication number: 20250233832Abstract: Techniques as described herein may be implemented to support processing CT and SAF traffic. A common packet data buffer is allocated to store incoming CT and SAF packet data. SAF packet control data are directed onto a control data path with first processing engines, to arrive at a scheduler with a first latency. CT packet control data are directed onto a second control data path to arrive at the scheduler with a second latency less than the first latency after processing in the second control path by second processing engines bypassing a subset of the first processing engines. CT and SAF packet dequeue requests are generated for CT and SAF packets, respectively, using the CT and SAF packet control data and merged into a merged sequence of dequeue requests to retrieve corresponding packet data from the common packet data buffer based on the merged sequence of dequeue requests.Type: ApplicationFiled: January 10, 2025Publication date: July 17, 2025Inventors: Viraj Milind ATHAVALE, Srinivasan DK, Ashwin ALAPATI, William Brad MATTHEWS, Ajit Kumar JAIN
-
Patent number: 12335165Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: March 13, 2024Date of Patent: June 17, 2025Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
-
Patent number: 12216518Abstract: A first component of a network device determines that the first component is to provide packet data to a second component of the network device for processing by the second component. In connection with determining that the first component is to provide packet data to the second component of the network device, the first component prompts the second component to activate a clock network of the second component. In connection with prompting the second component to activate the clock network, the first component sends the packet data to the second component to be processed by the second component. The first component determines when the second component has completed processing of the packet data, and prompts the second component to deactivate the clock network in response to determining that the second component has completed processing of the packet data.Type: GrantFiled: February 23, 2023Date of Patent: February 4, 2025Assignee: Marvell Asia Pte LtdInventors: Ashwin Alapati, Ajit Jain, Srinivas Gangam
-
Publication number: 20240340250Abstract: Packet metadata for incoming packets are buffered in queue selection buffers associated with a port of a network node. Packet data for outgoing packets are buffered in a port selection buffer associated with the port. At a selection clock cycle, while a port scheduler of the network node selects a subset of the packet data for a subset of the outgoing packets from the port selection buffer, a queue scheduler of the port concurrently selects a subset of the packet metadata for a subset of the incoming packets from the queue selection buffers and adds new packet data for new outgoing packets to the port selection buffer of the port. The new packet data are derived based at least in part on the subset of the packet metadata for the subset of the incoming packets.Type: ApplicationFiled: July 27, 2023Publication date: October 10, 2024Inventors: William Brad MATTHEWS, Ashwin ALAPATI
-
Publication number: 20240288923Abstract: A first component of a network device determines that the first component is to provide packet data to a second component of the network device for processing by the second component. In connection with determining that the first component is to provide packet data to the second component of the network device, the first component prompts the second component to activate a clock network of the second component. In connection with prompting the second component to activate the clock network, the first component sends the packet data to the second component to be processed by the second component. The first component determines when the second component has completed processing of the packet data, and prompts the second component to deactivate the clock network in response to determining that the second component has completed processing of the packet data.Type: ApplicationFiled: February 23, 2023Publication date: August 29, 2024Inventors: Ashwin ALAPATI, Ajit JAIN, Srinivas GANGAM
-
Patent number: 11949601Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: September 12, 2022Date of Patent: April 2, 2024Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
-
Patent number: 11805066Abstract: A scheduler in a network device serves ports with data units from a plurality of queues. The scheduler implements a scheduling algorithm that is normally constrained to releasing data to a port no more frequently than at a default maximum service rate. However, when data units smaller than a certain size are at the heads of one or more data unit queues assigned to a port, the scheduler may temporarily increase the maximum service rate of that port. The increased service rate permits fuller realization of a port's maximum bandwidth when handling smaller data units. In some embodiments, increasing the service rate involves dequeuing more than one small data unit at a time, with the extra data units temporarily stored in a port FIFO. The scheduler adds a pseudo-port to its scheduling sequence to schedule release of data from the port FIFO, with otherwise minimal impact on the scheduling logic.Type: GrantFiled: January 4, 2021Date of Patent: October 31, 2023Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Ashwin Alapati
-
Patent number: 11470016Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: July 9, 2020Date of Patent: October 11, 2022Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
-
Patent number: 10938739Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: November 9, 2018Date of Patent: March 2, 2021Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
-
Patent number: 9894670Abstract: A resource management system for a network device is described. A resource management system includes a resource manager configured to generate a sequence of a plurality of access time slots for a plurality of candidate entities and to redistribute access to one or more of the plurality of access time slots in the sequence based on availability and eligibility. The resource management system also includes a resource monitor configured to detect usage of each of the access time slots by each of the plurality of candidate entities.Type: GrantFiled: December 17, 2015Date of Patent: February 13, 2018Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Bruce H. Kwan, Ashwin Alapati, William Fan, Ajit K. Jain