Patents by Inventor Ashwin Alapati
Ashwin Alapati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12335165Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: March 13, 2024Date of Patent: June 17, 2025Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
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Patent number: 12216518Abstract: A first component of a network device determines that the first component is to provide packet data to a second component of the network device for processing by the second component. In connection with determining that the first component is to provide packet data to the second component of the network device, the first component prompts the second component to activate a clock network of the second component. In connection with prompting the second component to activate the clock network, the first component sends the packet data to the second component to be processed by the second component. The first component determines when the second component has completed processing of the packet data, and prompts the second component to deactivate the clock network in response to determining that the second component has completed processing of the packet data.Type: GrantFiled: February 23, 2023Date of Patent: February 4, 2025Assignee: Marvell Asia Pte LtdInventors: Ashwin Alapati, Ajit Jain, Srinivas Gangam
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Publication number: 20240340250Abstract: Packet metadata for incoming packets are buffered in queue selection buffers associated with a port of a network node. Packet data for outgoing packets are buffered in a port selection buffer associated with the port. At a selection clock cycle, while a port scheduler of the network node selects a subset of the packet data for a subset of the outgoing packets from the port selection buffer, a queue scheduler of the port concurrently selects a subset of the packet metadata for a subset of the incoming packets from the queue selection buffers and adds new packet data for new outgoing packets to the port selection buffer of the port. The new packet data are derived based at least in part on the subset of the packet metadata for the subset of the incoming packets.Type: ApplicationFiled: July 27, 2023Publication date: October 10, 2024Inventors: William Brad MATTHEWS, Ashwin ALAPATI
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Publication number: 20240288923Abstract: A first component of a network device determines that the first component is to provide packet data to a second component of the network device for processing by the second component. In connection with determining that the first component is to provide packet data to the second component of the network device, the first component prompts the second component to activate a clock network of the second component. In connection with prompting the second component to activate the clock network, the first component sends the packet data to the second component to be processed by the second component. The first component determines when the second component has completed processing of the packet data, and prompts the second component to deactivate the clock network in response to determining that the second component has completed processing of the packet data.Type: ApplicationFiled: February 23, 2023Publication date: August 29, 2024Inventors: Ashwin ALAPATI, Ajit JAIN, Srinivas GANGAM
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Patent number: 11949601Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: September 12, 2022Date of Patent: April 2, 2024Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
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Patent number: 11805066Abstract: A scheduler in a network device serves ports with data units from a plurality of queues. The scheduler implements a scheduling algorithm that is normally constrained to releasing data to a port no more frequently than at a default maximum service rate. However, when data units smaller than a certain size are at the heads of one or more data unit queues assigned to a port, the scheduler may temporarily increase the maximum service rate of that port. The increased service rate permits fuller realization of a port's maximum bandwidth when handling smaller data units. In some embodiments, increasing the service rate involves dequeuing more than one small data unit at a time, with the extra data units temporarily stored in a port FIFO. The scheduler adds a pseudo-port to its scheduling sequence to schedule release of data from the port FIFO, with otherwise minimal impact on the scheduling logic.Type: GrantFiled: January 4, 2021Date of Patent: October 31, 2023Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Ashwin Alapati
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Patent number: 11470016Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: July 9, 2020Date of Patent: October 11, 2022Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
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Patent number: 10938739Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.Type: GrantFiled: November 9, 2018Date of Patent: March 2, 2021Assignee: Innovium, Inc.Inventors: Ajit Kumar Jain, Mohammad Kamel Issa, Avinash Gyanendra Mani, Ashwin Alapati
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Patent number: 9894670Abstract: A resource management system for a network device is described. A resource management system includes a resource manager configured to generate a sequence of a plurality of access time slots for a plurality of candidate entities and to redistribute access to one or more of the plurality of access time slots in the sequence based on availability and eligibility. The resource management system also includes a resource monitor configured to detect usage of each of the access time slots by each of the plurality of candidate entities.Type: GrantFiled: December 17, 2015Date of Patent: February 13, 2018Assignee: Innovium, Inc.Inventors: William Brad Matthews, Puneet Agarwal, Bruce H. Kwan, Ashwin Alapati, William Fan, Ajit K. Jain