Abstract: A method and apparatus for loading portions of a bank of program latches in parallel while providing charge sharing immunity is described. A latch is bypassed while it is loaded, thereby coupling the input to the output, so that any capacitance on the output is charged. In later load operations, when the input to the latch is not driven with data, but is rather left to float, the output is again coupled to the input so that the charged capacitance on the output keeps the input from changing state. The program latches can be used as part of a memory device, to hold data on shared bitlines in columns of a memory array while the array is programmed. The program latches are controlled by a latch load signal and a latch bypass signal, both of which are fanned out across the bank of program latches.