Patents by Inventor Asit Mishra

Asit Mishra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230053289
    Abstract: An apparatus to facilitate acceleration of machine learning operations is disclosed. The apparatus comprises at least one processor to perform operations to implement a neural network and accelerator logic to perform communicatively coupled to the processor to perform compute operations for the neural network.
    Type: Application
    Filed: June 21, 2022
    Publication date: February 16, 2023
    Applicant: Intel Corporation
    Inventors: Amit Bleiweiss, Anavai Ramesh, Asit Mishra, Deborah Marr, Jeffrey Cook, Srinivas Sridharan, Eriko Nurvitadhi, Elmoustapha Ould-Ahmed-Vall, Dheevatsa Mudigere, Mohammad Ashraf Bhuiyan, Md Faijul Amin, Wei Wang, Dhawal Srivastava, Niharika Maheshwari
  • Patent number: 11379229
    Abstract: An apparatus and method for performing efficient, adaptable tensor operations. For example, one embodiment of a processor comprises: front end circuitry to schedule matrix operations responsive to a matrix multiplication instruction; a plurality of lanes to perform parallel execution of the matrix operations, wherein a lane comprises an arithmetic logic unit to multiply a block of a first matrix with a block of a second matrix to generate a product and to accumulate the product with a block of a third matrix, and wherein the matrix blocks are to be stored in registers within the lane; and broadcast circuitry to broadcast one or more invariant matrix blocks to at least one of different registers within the lane and different registers across different lanes.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: July 5, 2022
    Assignee: INTEL CORPORATION
    Inventors: Jonathan Pearce, David Sheffield, Srikanth Srinivasan, Jeffrey Cook, Debbie Marr, Abhijit Davare, Asit Mishra, Steven Burns, Desmond A. Kirkpatrick, Andrey Ayupov, Anton Alexandrovich Sorokin, Eriko Nurvitadhi
  • Patent number: 11373088
    Abstract: An apparatus to facilitate acceleration of machine learning operations is disclosed. The apparatus comprises at least one processor to perform operations to implement a neural network and accelerator logic to perform communicatively coupled to the processor to perform compute operations for the neural network.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: June 28, 2022
    Assignee: INTEL CORPORATION
    Inventors: Amit Bleiweiss, Anavai Ramesh, Asit Mishra, Deborah Marr, Jeffrey Cook, Srinivas Sridharan, Eriko Nurvitadhi, Elmoustapha Ould-Ahmed-Vall, Dheevatsa Mudigere, Mohammad Ashraf Bhuiyan, Md Faijul Amin, Wei Wang, Dhawal Srivastava, Niharika Maheshwari
  • Publication number: 20200364045
    Abstract: An apparatus and method for performing efficient, adaptable tensor operations. For example, one embodiment of a processor comprises: front end circuitry to schedule matrix operations responsive to a matrix multiplication instruction; a plurality of lanes to perform parallel execution of the matrix operations, wherein a lane comprises an arithmetic logic unit to multiply a block of a first matrix with a block of a second matrix to generate a product and to accumulate the product with a block of a third matrix, and wherein the matrix blocks are to be stored in registers within the lane; and broadcast circuitry to broadcast one or more invariant matrix blocks to at least one of different registers within the lane and different registers across different lanes.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 19, 2020
    Inventors: Jonathan Pearce, David Sheffield, Srikanth Srinivasan, Jeffrey Cook, Debbie Marr, Abhijit Davare, Asit Mishra, Steven Burns, Desmond A. Kirkpatrick, Andrey Ayupov, Anton Alexandrovich Sorokin, Eriko Nurvitadhi
  • Patent number: 10776110
    Abstract: An apparatus and method for performing efficient, adaptable tensor operations.
    Type: Grant
    Filed: September 29, 2018
    Date of Patent: September 15, 2020
    Assignee: Intel Corporation
    Inventors: Jonathan Pearce, David Sheffield, Srikanth Srinivasan, Jeffrey Cook, Deborah Marr, Abhijit Davare, Asit Mishra, Steven Burns, Desmond Kirkpatrick, Andrey Ayupov, Anton Alexandrovich Sorokin, Eriko Nurvitadhi
  • Publication number: 20200104126
    Abstract: An apparatus and method for performing efficient, adaptable tensor operations.
    Type: Application
    Filed: September 29, 2018
    Publication date: April 2, 2020
    Inventors: Jonathan Pearce, David Sheffield, Srikanth Srinivasan, Jeffrey Cook, Deborah Marr, Abhijit Davare, Asit Mishra, Steven Burns, Desmond Kirkpatrick, Andrey Ayupov, Anton Alexandrovich Sorokin, Eriko Nurvitadhi
  • Publication number: 20200050452
    Abstract: Disclosed embodiments relate to apparatuses, systems, and methods for performing sort indexing and/or permutation using an index. An exemplary apparatus includes decode circuitry to decode an instruction, the instruction to include a first field to identify a location of a source vector, a second field to identify a location of a destination vector, and an opcode to indicate to execution circuitry to execute the decoded instruction to sort values of the source vector and store a result of the sort in the destination vector by generating, per each element of the source vector, an index value using one or more comparisons of the element itself and to other data elements of the source vector, and permuting the values of the elements of the source vector based upon the index values for the elements and execution circuitry to execute the decoded instruction as indicated by the opcode.
    Type: Application
    Filed: March 27, 2019
    Publication date: February 13, 2020
    Inventors: Dan BAUM, Ronen ZOHAR, Asit MISHRA, Prasoonkumar Surti, Elmoustapha OULD-AHMED-VALL, Christopher HUGHES, Alexander HEINECKE
  • Publication number: 20190205737
    Abstract: An apparatus to facilitate acceleration of machine learning operations is disclosed. The apparatus comprises at least one processor to perform operations to implement a neural network and accelerator logic to perform communicatively coupled to the processor to perform compute operations for the neural network.
    Type: Application
    Filed: December 30, 2017
    Publication date: July 4, 2019
    Applicant: Intel Corporation
    Inventors: Amit Bleiweiss, Anavai Ramesh, Asit Mishra, Deborah Marr, Jeffrey Cook, Srinivas Sridharan, Eriko Nurvitadhi, Elmoustapha Ould-Ahmed-Vall, Dheevatsa Mudigere, Mohammad Ashraf Bhuiyan, Md Faijul Amin, Wei Wang, Dhawal Srivastava, Niharika Maheshwari
  • Publication number: 20130005414
    Abstract: The present invention provides a mobile device cradle for a vehicle. The cradle may include docking members for receiving a mobile device of a driver of the vehicle. The cradle may also include a face recognition means for periodically capturing a face of the driver, environmental conditions, and traffic conditions. Further, the cradle may include an authentication unit for authenticating the mobile device and the face of the driver captured by the face recognition means and for providing an authentication signal for starting the vehicle to an electronic engine control unit (EECU). Furthermore, the cradle may include an information collection unit for collecting dynamic information associated with the driver and the vehicle from monitoring units. Moreover, the cradle may also include a communication unit for communicating the dynamic information to back office system(s) communicatively coupled to the mobile device via a wireless communication network.
    Type: Application
    Filed: March 14, 2011
    Publication date: January 3, 2013
    Inventors: Gurbrinder Singh Bindra, Ajith Kumar Padmalayam Narayana Kurup, Shanmugasundaram Murugesan, Asit Mishra