Patents by Inventor Aske Simon Christensen

Aske Simon Christensen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9865084
    Abstract: A graphics processor includes a vertex shader 20 that processes input attribute values from a vertex buffer 26 to generate output vertex shaded attribute values 28 to be used by a rasterizer/fragment shader 22 of the graphics processor when processing an image for display. Vertex shader output attributes for which the vertex shader input attributes that the vertex shader output attribute depends on are defined solely on a per-vertex basis or solely on a per-instance basis are identified. Then, for such vertex shader output attributes, the vertex shader 20 stores, for use by the rasterizer/fragment shader 22 of the graphics processor when processing an image for display, only one copy of the vertex shader output attribute for a given vertex or instance, respectively, irrespective of the number of instances or vertices, respectively, that the output attribute value applies to.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: January 9, 2018
    Assignee: Arm Limited
    Inventors: Jorn Nystad, Aske Simon Christensen
  • Patent number: 9818218
    Abstract: A graphics processor includes a vertex shader 20 that processes input attribute values from a vertex buffer 26 to generate output vertex shaded attribute values 28 to be used by a rasterizer/fragment shader 22 of the graphics processor when processing an image for display. The system recognizes when a vertex shader output attribute value to be generated from a vertex shader input attribute value by the vertex shader 20 will be a copy of the vertex shader input attribute value from which it is to be generated. In this event, the vertex shader 20 does not generate the copy vertex shader output attribute value, but the rasterizer/fragment shader 22 instead processes the corresponding vertex shader input attribute value in place of the copy vertex shader output attribute value that would otherwise have been generated by the vertex shader 20.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: November 14, 2017
    Assignee: Arm Limited
    Inventors: Jorn Nystad, Aske Simon Christensen
  • Patent number: 9417877
    Abstract: An apparatus for processing data 2 is provided including processing circuitry 24 controlled by an instruction decoder 20 in response to a stream of program instructions. There is also provided dedicated function hardware 12 configured to receive output data from the processing circuitry and to perform a dedicated processing operation. The instruction decoder 20 is responsive to an end instruction 54 and a software processing flag (blend_shade_enabled) to control the processing circuitry to end a current software routine, to generate output data and in dependence upon the software processing flag either trigger processing of the output data by the dedicated function hardware or trigger the processing circuitry to perform a further software routine upon the output data to generate software generated result data instead of hardware generated result data as generated by the dedicated hardware circuitry.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: August 16, 2016
    Assignee: ARM Limited
    Inventors: Simon Jones, Andreas Engh-Halstvedt, Aske Simon Christensen
  • Publication number: 20150193969
    Abstract: A graphics processor includes a vertex shader 20 that processes input attribute values from a vertex buffer 26 to generate output vertex shaded attribute values 28 to be used by a rasteriser/fragment shader 22 of the graphics processor when processing an image for display. Vertex shader output attributes for which the vertex shader input attributes that the vertex shader output attribute depends on are defined solely on a per-vertex basis or solely on a per-instance basis are identified. Then, for such vertex shader output attributes, the vertex shader 20 stores, for use by the rasteriser/fragment shader 22 of the graphics processor when processing an image for display, only one copy of the vertex shader output attribute for a given vertex or instance, respectively, irrespective of the number of instances or vertices, respectively, that the output attribute value applies to.
    Type: Application
    Filed: January 26, 2015
    Publication date: July 9, 2015
    Applicant: ARM LIMITED
    Inventors: Jorn Nystad, Aske Simon Christensen
  • Patent number: 8976177
    Abstract: A graphics processor includes a vertex shader 20 that processes input attribute values from a vertex buffer 26 to generate output vertex shaded attribute values 28 to be used by a rasteriser/fragment shader 22 of the graphics processor when processing an image for display. Vertex shader output attributes for which the vertex shader input attributes that the vertex shader output attribute depends on are defined solely on a per-vertex basis or solely on a per-instance basis are identified. Then, for such vertex shader output attributes, the vertex shader 20 stores, for use by the rasteriser/fragment shader 22 of the graphics processor when processing an image for display, only one copy of the vertex shader output attribute for a given vertex or instance, respectively, irrespective of the number of instances or vertices, respectively, that the output attribute value applies to.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: March 10, 2015
    Assignee: Arm Limited
    Inventors: Jorn Nystad, Aske Simon Christensen
  • Patent number: 8928668
    Abstract: An input stroked curve that is received by a graphics processing system can be rendering using at least two, and preferably more, rendering processes that are available for use by the system. The process or processes that are used for rendering the received stroked curve are selected based on whether the input stroked curve comprises one or more regions having a particular characteristic or characteristics, e.g. whether the input stroked curve comprises one or more self-overlapping regions. Preferably, the at least two rendering processes are each capable of correctly rendering different sets of stroked curves. Furthermore, the least two rendering process preferably differ in the processing burden that they place on the graphics processing system.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: January 6, 2015
    Assignee: ARM Limited
    Inventors: Jorn Nystad, Rune Holm, Aske Simon Christensen
  • Patent number: 8928667
    Abstract: When rendering a stroked curve for display in a graphics processing system, an input stroked curve 1 defined in user space 2 is received by the system. The portion of a canonical space 5 that corresponds to the received stroked curve 1 is determined by determining the portion of a canonical curve 12 defined in the canonical space 5 that corresponds to the received stroked curve 1. Then, for each of a plurality of sampling points within one or more primitives 4 that are generated to cover the received stroked curve 1? following its projection into surface space 3, it is determined whether a corresponding location in canonical space 5 (to the sampling point in surface space 3) is within the portion of the canonical space that corresponds to the received stroked curve, e.g. by looking up suitable information that has been stored (in advance) in one or more graphics textures. Data for rendering the received stroked curve 1 (e.g.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: January 6, 2015
    Assignee: ARM Limited
    Inventors: Jorn Nystad, Rune Holm, Aske Simon Christensen
  • Patent number: 8922568
    Abstract: An apparatus for processing data 2 is provided including processing circuitry 24 controlled by an instruction decoder 20 in response to a stream of program instructions. There is also provided dedicated function hardware 12 configured to receive output data from the processing circuitry and to perform a dedicated processing operation. The instruction decoder 20 is responsive to an end instruction 54 and a software processing flag (blend_shade_enabled) to control the processing circuitry to end a current software routine, to generate output data and in dependence upon the software processing flag either trigger processing of the output data by the dedicated function hardware or trigger the processing circuitry to perform a further software routine upon the output data to generate software generated result data instead of hardware generated result data as generated by the dedicated hardware circuitry.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: December 30, 2014
    Assignee: ARM Limited
    Inventors: Simon Jones, Andreas Engh-Halstvedt, Aske Simon Christensen
  • Patent number: 8922572
    Abstract: The fragment processing pipeline 10 of a graphics processing core 2 has an associated occlusion query cache 19 that is used to maintain a set of local occlusion counters 21. The occlusion query cache 19 is maintained in a local memory 3 of the graphics processing system and can communicate via an interconnect 7 with a set of master occlusion counters 22 in a main memory 5 for the graphics processing system. When an occlusion query starts, a corresponding occlusion counter 22 is initialised in the main memory 5. A corresponding local occlusion counter 21 is also provided in the occlusion query cache 19 in the local memory 3 of the graphics processor, and is used to count the results of the occlusion query. The local occlusion counter value is written back to the occlusion counter 22 for the query in the main memory 5 at the appropriate time for further processing.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: December 30, 2014
    Assignee: ARM Limited
    Inventors: Frode Heggelund, Aske Simon Christensen, Andreas Engh-Halstvedt
  • Publication number: 20140289499
    Abstract: An apparatus for processing data 2 is provided including processing circuitry 24 controlled by an instruction decoder 20 in response to a stream of program instructions. There is also provided dedicated function hardware 12 configured to receive output data from the processing circuitry and to perform a dedicated processing operation. The instruction decoder 20 is responsive to an end instruction 54 and a software processing flag (blend_shade_enabled) to control the processing circuitry to end a current software routine, to generate output data and in dependence upon the software processing flag either trigger processing of the output data by the dedicated function hardware or trigger the processing circuitry to perform a further software routine upon the output data to generate software generated result data instead of hardware generated result data as generated by the dedicated hardware circuitry.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 25, 2014
    Inventors: Simon JONES, Andreas ENGH-HALSTVEDT, Aske Simon CHRISTENSEN
  • Publication number: 20120223946
    Abstract: A graphics processor includes a vertex shader 20 that processes input attribute values from a vertex buffer 26 to generate output vertex shaded attribute values 28 to be used by a rasteriser/fragment shader 22 of the graphics processor when processing an image for display. The system recognises when a vertex shader output attribute value to be generated from a vertex shader input attribute value by the vertex shader 20 will be a copy of the vertex shader input attribute value from which it is to be generated. In this event, the vertex shader 20 does not generate the copy vertex shader output attribute value, but the rasteriser/fragment shader 22 instead processes the corresponding vertex shader input attribute value in place of the copy vertex shader output attribute value that would otherwise have been generated by the vertex shader 20.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 6, 2012
    Inventors: Jorn Nystad, Aske Simon Christensen
  • Publication number: 20120223947
    Abstract: A graphics processor includes a vertex shader 20 that processes input attribute values from a vertex buffer 26 to generate output vertex shaded attribute values 28 to be used by a rasteriser/fragment shader 22 of the graphics processor when processing an image for display. Vertex shader output attributes for which the vertex shader input attributes that the vertex shader output attribute depends on are defined solely on a per-vertex basis or solely on a per-instance basis are identified. Then, for such vertex shader output attributes, the vertex shader 20 stores, for use by the rasteriser/fragment shader 22 of the graphics processor when processing an image for display, only one copy of the vertex shader output attribute for a given vertex or instance, respectively, irrespective of the number of instances or vertices, respectively, that the output attribute value applies to.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 6, 2012
    Inventors: Jorn Nystad, Aske Simon Christensen
  • Publication number: 20120007878
    Abstract: An apparatus for processing data 2 is provided including processing circuitry 24 controlled by an instruction decoder 20 in response to a stream of program instructions. There is also provided dedicated function hardware 12 configured to receive output data from the processing circuitry and to perform a dedicated processing operation. The instruction decoder 20 is responsive to an end instruction 54 and a software processing flag (blend_shade_enabled) to control the processing circuitry to end a current software routine, to generate output data and in dependence upon the software processing flag either trigger processing of the output data by the dedicated function hardware or trigger the processing circuitry to perform a further software routine upon the output data to generate software generated result data instead of hardware generated result data as generated by the dedicated hardware circuitry.
    Type: Application
    Filed: June 9, 2011
    Publication date: January 12, 2012
    Applicant: ARM Limited
    Inventors: Simon Jones, Andreas Engh-Halstvedt, Aske Simon Christensen
  • Publication number: 20110276966
    Abstract: A processing apparatus includes task manager circuitry 14 issuing task specifiers to processing circuitry 16, 18, 20, 22, 24 indicating processing tasks to be performed. The task specifier includes a relaxed dependency identifier to which the processing circuitry is responsive. The processing circuitry responds to the relaxed dependency identifier by starting the processing task concerned and then controlling the processing task concerned in dependency upon the status of the other processing task upon which there is a relaxed dependency. The task specifier may also indicate a strict dependency in which a processing task may not be started until the other processing task has completed as well as a no dependency indication in which the processing task may be started without reference to any other processing task.
    Type: Application
    Filed: May 6, 2010
    Publication date: November 10, 2011
    Applicant: ARM LIMITED
    Inventors: Aske Simon Christensen, Sean Ellis, Andreas Engh-Halstvedt
  • Publication number: 20100097383
    Abstract: An input stroked curve 1 that is received by a graphics processing system can be rendering using at least two, and preferably more, rendering processes that are available for use by the system. The process or processes that are used for rendering the received stroked curve 1 are selected based on whether the input stroked curve comprises one or more regions having a particular characteristic or characteristics, e.g. whether the input stroked curve 1 comprises one or more self-overlapping regions. Preferably, the at least two rendering processes are each capable of correctly rendering different sets of stroked curves. Furthermore, the least two rendering process preferably differ in the processing burden that they place on the graphics processing system.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 22, 2010
    Applicant: ARM Limited
    Inventors: Jørn Nystad, Rune Holm, Aske Simon Christensen
  • Publication number: 20100097382
    Abstract: When rendering a stroked curve for display in a graphics processing system, an input stroked curve 1 defined in user space 2 is received by the system. The portion of a canonical space 5 that corresponds to the received stroked curve 1 is determined by determining the portion of a canonical curve 12 defined in the canonical space 5 that corresponds to the received stroked curve 1. Then, for each of a plurality of sampling points within one or more primitives 4 that are generated to cover the received stroked curve 1? following its projection into surface space 3, it is determined whether a corresponding location in canonical space 5 (to the sampling point in surface space 3) is within the portion of the canonical space that corresponds to the received stroked curve, e.g. by looking up suitable information that has been stored (in advance) in one or more graphics textures. Data for rendering the received stroked curve 1 (e.g.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 22, 2010
    Inventors: Jørn Nystad, Rune Holm, Aske Simon Christensen