Patents by Inventor Aslam HASWAREY

Aslam HASWAREY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12520426
    Abstract: Embodiments herein relate to systems, apparatuses, or processes to using vias, or plated through holes (PTH), within a substrate or within a sub laminate to create capacitors. The interior of a via may have a first layer, or coating, of an electrically conductive material such as copper, formed on the sides of the via. A second layer including a dielectric material is placed on the first layer of the electrically conductive material. A third layer of electrically conductive material may then be placed on the second layer of the dielectric material. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: January 6, 2026
    Assignee: Intel Corporation
    Inventors: Aslam Haswarey, Anne Augustine, Yan Fen Shen
  • Patent number: 12489026
    Abstract: A thermal control circuit is described. The thermal control circuit includes a heating element disposed within an electronic circuit board having a semiconductor chip disposed thereon. The thermal control circuit includes a power management integrated circuit coupled to the heating element. The power management integrated circuit is to enable the heating element to heat the semiconductor chip at least to the semiconductor chips' lowest rated operating temperature prior to the semiconductor chip being placed in a fully operational state.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: December 2, 2025
    Assignee: Intel Corporation
    Inventors: Aslam Haswarey, Kevin Wells, Mehran Adyani-Yazdi, Daniel R. Russell, James C. Mowery, Vinesh Lal, Xiangying Ma
  • Publication number: 20230319997
    Abstract: Embodiments herein relate to systems, apparatuses, or processes to using vias, or plated through holes (PTH), within a substrate or within a sub laminate to create capacitors. The interior of a via may have a first layer, or coating, of an electrically conductive material such as copper, formed on the sides of the via. A second layer including a dielectric material is placed on the first layer of the electrically conductive material. A third layer of electrically conductive material may then be placed on the second layer of the dielectric material. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Inventors: Aslam HASWAREY, Anne AUGUSTINE, Yan Fen SHEN
  • Publication number: 20200258804
    Abstract: A thermal control circuit is described. The thermal control circuit includes a heating element disposed within an electronic circuit board having a semiconductor chip disposed thereon. The thermal control circuit includes a power management integrated circuit coupled to the heating element. The power management integrated circuit is to enable the heating element to heat the semiconductor chip at least to the semiconductor chips' lowest rated operating temperature prior to the semiconductor chip being placed in a fully operational state.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 13, 2020
    Inventors: Aslam HASWAREY, Kevin WELLS, Mehran ADYANI-YAZDI, Daniel R. RUSSELL, James C. MOWERY, Vinesh LAL, Xiangying MA