Patents by Inventor Asma Hajji

Asma Hajji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230318165
    Abstract: An electronic device includes an electronic integrated circuit chip assembled on a first region of a substrate. A radiation element of an antenna is mounted to the substrate in a manner where it is separated from the substrate by a second layer of a second dielectric material, and i\s further offset with respect to the first region of the substrate so that the radiation element does not cover the electronic integrated circuit chip. A first coating layer of a first coating material covers at least a surface of the electronic integrated circuit chip facing away from the substrate further covers a surface of the radiation element facing away from the substrate.
    Type: Application
    Filed: March 8, 2023
    Publication date: October 5, 2023
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain COFFY, Ouafa HAJJI, Asma HAJJI, Fabien QUERCIA
  • Publication number: 20230121780
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 20, 2023
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: David AUCHERE, Asma HAJJI, Fabien QUERCIA, Jerome LOPEZ
  • Patent number: 11557566
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: January 17, 2023
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: David Auchere, Asma Hajji, Fabien Quercia, Jerome Lopez
  • Publication number: 20220157683
    Abstract: A support substrate supports an electronic chip. An encapsulation coating on the support substrate coats the electronic chip. The encapsulation coating includes a trench surrounding the electronic chip. A heat sink is mounted to the encapsulation coating above the electronic chip. The heat sink is fixed to the encapsulation coating by an adhesive material and a thermal interface material layer is present between the electronic chip and the heat sink. The trench is positioned between the thermal interface material layer and the adhesive material.
    Type: Application
    Filed: November 10, 2021
    Publication date: May 19, 2022
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Younes BOUTALEB, Fabien QUERCIA, Asma HAJJI, Ouafa HAJJI
  • Publication number: 20200227382
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Application
    Filed: March 31, 2020
    Publication date: July 16, 2020
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: David AUCHERE, Asma HAJJI, Fabien QUERCIA, Jerome LOPEZ
  • Publication number: 20200196433
    Abstract: A method includes attaching a discrete component on a circuit board with a first glue, attaching an integrated circuit to the circuit board using a third glue, and attaching a cap to the circuit board using a second glue. The first glue has a composition such that it does not interact electrically with the second glue and does not interact electrically with the third glue.
    Type: Application
    Filed: November 21, 2019
    Publication date: June 18, 2020
    Inventors: David Auchere, Norbert Chevrier, Fabien Quercia, Asma Hajji
  • Patent number: 10643970
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: David Auchere, Asma Hajji, Fabien Quercia, Jerome Lopez
  • Publication number: 20190148334
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Application
    Filed: January 16, 2019
    Publication date: May 16, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: David AUCHERE, Asma HAJJI, Fabien QUERCIA, Jerome LOPEZ
  • Patent number: 10224306
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: March 5, 2019
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: David Auchere, Asma Hajji, Fabien Quercia, Jerome Lopez
  • Publication number: 20180122770
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Application
    Filed: May 23, 2017
    Publication date: May 3, 2018
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: David Auchere, Asma Hajji, Fabien Quercia, Jerome Lopez