Patents by Inventor Asmita Saha

Asmita Saha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8035112
    Abstract: An intermediate product in the fabrication of a MOSFET, including a silicon carbide wafer having a substrate and a drift layer on said substrate, said drift layer having a plurality of source regions formed adjacent an upper surface thereof; a first oxide layer on said upper surface of said drift layer; a plurality of polysilicon gates above said first oxide layer, said plurality of polysilicon gates including a first gate adjacent a first of said source regions; an oxide layer over said first source region of greater thickness than said first oxide layer; and, an oxide layer over said first gate of substantially greater thickness than said oxide layer over said first source region.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: October 11, 2011
    Assignee: Purdue Research Foundation
    Inventors: James A. Cooper, Asmita Saha
  • Patent number: 7498633
    Abstract: A semiconductor device, such as a metal-oxide semiconductor field-effect transistor, includes a semiconductor substrate, a drift layer formed on the substrate, a first and a second source region, and a JFET region defined between the first and the second source regions. The JFET region may have a short width and/or a higher concentration of impurities than the drift layer. The semiconductor device may also include a current spreading layer formed on the drift layer. The current spreading layer may also have a higher concentration of impurities than the drift layer.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: March 3, 2009
    Assignee: Purdue Research Foundation
    Inventors: James A. Cooper, Asmita Saha
  • Publication number: 20060192256
    Abstract: A semiconductor device, such as a metal-oxide semiconductor field-effect transistor, includes a semiconductor substrate, a drift layer formed on the substrate, a first and a second source region, and a JFET region defined between the first and the second source regions. The JFET region may have a short width and/or a higher concentration of impurities than the drift layer. The semiconductor device may also include a current spreading layer formed on the drift layer. The current spreading layer may also have a higher concentration of impurities than the drift layer.
    Type: Application
    Filed: January 23, 2006
    Publication date: August 31, 2006
    Inventors: James Cooper, Asmita Saha