Patents by Inventor Asnat MASAD

Asnat MASAD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935972
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: March 19, 2024
    Assignee: Maxeon Solar Pte. Ltd.
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Publication number: 20220262966
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Application
    Filed: May 6, 2022
    Publication date: August 18, 2022
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 11355654
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: June 7, 2022
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Publication number: 20200119220
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 16, 2020
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10505068
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: December 10, 2019
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Publication number: 20190189813
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Application
    Filed: February 25, 2019
    Publication date: June 20, 2019
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10217878
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: February 26, 2019
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Publication number: 20170288070
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 5, 2017
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Publication number: 20140174497
    Abstract: Solar cell wafers are fabricated, tested, and sorted into solar cell wafer stacks. A solar cell wafer stack includes a solar cell wafer with a front side that faces a front side of an adjacent solar cell wafer, and another solar cell wafer with a backside that directly contacts a backside of the solar cell wafer. A front side protector may be placed between front sides of adjacent solar cell wafers. The solar cell wafer stack includes end pieces on both ends, and is wrapped to hold and bundle the solar cell wafers, front side protectors, and end pieces together as a single unit. The solar cell wafer stack is boxed along with other solar cell wafer stacks, and then transported to another location where the solar cell wafers are assembled into solar cell modules.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: Xiuwen TU, Asnat MASAD