Patents by Inventor Assaf Mendelson

Assaf Mendelson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11223623
    Abstract: There are disclosed techniques for use in providing security in a computer network. In one embodiment, the techniques comprise a method including multiple steps. The method comprises receiving user access data characterizing user access with a protected resource within a computer network. The method also comprises evaluating the user access data to extract information therefrom that describes user access with respect to a feature of user access. The method also comprises determining a cardinality value in connection with the feature based on the extracted information and a maximum cardinality threshold. It should be appreciated that the cardinality value is limited by the maximum cardinality threshold such that the cardinality value cannot exceed the maximum cardinality threshold. The method also comprises presenting the cardinality value for facilitating fraud detection.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: January 11, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Eyal Kolman, Assaf Mendelson, Eugene Gulko, Dan Karpati
  • Patent number: 8005066
    Abstract: A system for path finding and terrain analysis. The system includes at least one processing unit, a graph processing unit and an artificial intelligence logic unit. A local bus is coupled to the at least one processing unit, the graph processing unit, the artificial intelligence unit and a bus interface unit. A memory bus is coupled to said bus interface unit, the at least one processing unit, a data memory, and a program memory. The graph processing unit further includes a network of interconnected nodes. Each of said nodes have at least one digitally programmable delay unit.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: August 23, 2011
    Inventors: Kareev Uri, Amihai Viks, Assaf Mendelson, Ramon Axelrod
  • Publication number: 20090013090
    Abstract: A system for path finding and terrain analysis. The system includes at least one processing unit, a graph processing unit and an artificial intelligence logic unit. A local bus is coupled to the at least one processing unit, the graph processing unit, the artificial intelligence unit and a bus interface unit. A memory bus is coupled to said bus interface unit, the at least one processing unit, a data memory, and a program memory. The graph processing unit further includes a network of interconnected nodes. Each of said nodes have at least one digitally programmable delay unit.
    Type: Application
    Filed: September 10, 2008
    Publication date: January 8, 2009
    Applicant: AiSeek Ltd.
    Inventors: Uri Kareev, Amihai Viks, Assaf Mendelson, Ramon Axelrod
  • Patent number: 7440447
    Abstract: A system for path finding and terrain analysis. The system includes at least one processing unit, a graph processing unit and an artificial intelligence logic unit. A local bus is coupled to the at least one processing unit, the graph processing unit, the artificial intelligence unit and a bus interface unit. A memory bus is coupled to said bus interface unit, the at least one processing unit, a data memory, and a program memory. The graph processing unit further includes a network of interconnected nodes. Each of said nodes have at least one digitally programmable delay unit.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: October 21, 2008
    Assignee: AiSeek Ltd.
    Inventors: Uri Kareev, Amihai Viks, Assaf Mendelson, Ramon Axelrod
  • Publication number: 20050267987
    Abstract: A system for path finding and terrain analysis. The system includes at least one processing unit, a graph processing unit and an artificial intelligence logic unit. A local bus is coupled to the at least one processing unit, the graph processing unit, the artificial intelligence unit and a bus interface unit. A memory bus is coupled to said bus interface unit, the at least one processing unit, a data memory, and a program memory. The graph processing unit further includes a network of interconnected nodes. Each of said nodes have at least one digitally programmable delay unit.
    Type: Application
    Filed: March 25, 2005
    Publication date: December 1, 2005
    Inventors: Uri Kareev, Amihai Viks, Assaf Mendelson, Ramon Axelrod