Patents by Inventor Asunaro MAEDA

Asunaro MAEDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240172386
    Abstract: An electronic apparatus for inputting and outputting signals is provided with a plurality of processing circuits for inputting and outputting signals, a plurality of common power terminals connected to different processing circuits to supply power to each of the plurality of processing circuits, a plurality of individual power terminals connected to different processing circuits to supply power to each of the plurality of processing circuits, and a conductive member which is detachably provided and electrically connects the plurality of common power terminals.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 23, 2024
    Inventors: Masahiro SAEKI, Shinichi KUWAHATA, Asunaro MAEDA
  • Publication number: 20240168448
    Abstract: A master unit for transmitting signals to devices connected to I/O units is divided into: a connector module having a first connector and a main module having a master processing circuit, a second connector, a branch terminal, and a power supply part. The second connector and the master processing circuit are connected by first connection terminals provided to the connector module and the main module.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 23, 2024
    Applicant: FANUC CORPORATION
    Inventors: Masahiro SAEKI, Shinichi KUWAHATA, Asunaro MAEDA
  • Publication number: 20240168449
    Abstract: An I/O unit comprises: a plurality of first-stage-side terminals for connecting to a master unit or another I/O unit; a plurality of second-stage-side terminals that are provided in order to connect to the other I/O unit, and are connected to mutually distinct first-stage-side terminals; and a slave process circuit that performs signal processing and is connected to one of the plurality of first-stage-side terminals and to the second-stage-side terminal connected to that first-stage-side terminal.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 23, 2024
    Applicant: FANUC CORPORATION
    Inventors: Masahiro SAEKI, Shinichi KUWAHATA, Asunaro MAEDA
  • Publication number: 20240160591
    Abstract: An I/O unit comprises: a preceding stage-side mainstream terminal and a preceding stage-side branch terminal that are connected to preceding-stage master units; a next stage-side branch terminal that is connected to the preceding-stage branch terminal and connected to another I/O unit; a slave processing circuit that is connected to the preceding stage-side branch terminal and the next stage-side branch terminal; and a next stage-side mainstream terminal connected to the preceding stage-side mainstream terminal and a master unit in the next stage.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 16, 2024
    Applicant: FANUC CORPORATION
    Inventors: Masahiro SAEKI, Shinichi KUWAHATA, Asunaro MAEDA
  • Publication number: 20240152107
    Abstract: A master unit that transmits a signal with a device via an I/O unit comprises: a connector module having a first connector and a power source unit; and a signal processing module having a branch terminal and a master processing circuit. The connector module and the signal processing module further comprise connection terminal units that connect the first connector and the power source unit with the master processing circuit.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 9, 2024
    Applicant: FANUC CORPORATION
    Inventors: Masahiro SAEKI, Shinichi KUWAHATA, Asunaro MAEDA