Patents by Inventor Atchi Reddy Chavva

Atchi Reddy Chavva has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for designing a semiconductor chip based on grouping of hierarchial pins that permit communication between internal components of the semiconductor chip
    Patent number: 9852257
    Abstract: Embodiments include a computer implemented method comprising: while designing a chip, identifying a plurality of partitions in the chip, for a first partition of the plurality of partitions in the chip, identifying a plurality of pins configured to interconnect the first partition with one or more other partitions of the plurality of partitions of the chip, assigning a name to each of the plurality of pins associated with the first partition of the plurality of partitions, based on the names assigned to each of the plurality of pins, forming a plurality of groups such that each group of the plurality of groups is associated with a corresponding one or more pins of the plurality of pins, and based on forming the plurality of groups, designing a first subset of the plurality of pins to be located at close proximity in the chip.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: December 26, 2017
    Assignee: Marvell International Ltd.
    Inventor: Atchi Reddy Chavva