Patents by Inventor ATI Technologies ULC
ATI Technologies ULC has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130219134Abstract: A method and system for performing byte-writes are described, where byte-writes involve writing only particular bytes of a multiple byte write operation. Embodiments include mask data that indicates which bytes are to be written in a byte-write operation. No dedicated mask pin(s) or dedicated mask line(s) are used. In one embodiment, the mask data is transmitted on data lines and store in response to a write_mask command. In one embodiment, the mask data is transmitted as part of the write command.Type: ApplicationFiled: March 19, 2013Publication date: August 22, 2013Applicant: ATI TECHNOLOGIES ULCInventor: ATI Technologies ULC
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Publication number: 20130216198Abstract: A content player includes a pausable mass storage device player that can be used to record and play content. The pausable mass storage device can become paused in response to an assertion of a pause signal. Once paused, the content player remains paused until the pause signal is deasserted. The content player also includes an event detector that is coupled to the pausable mass storage device player. The content player detects a non-viewer initiated event, (e.g., an automatic event such as the receipt of an email with embedded enhanced content), and to assert the pause signal in response thereto. The content player receives content, detects an event, and in response to detecting the event, pauses the content to a presentation device and spools the content onto the mass storage device.Type: ApplicationFiled: March 18, 2013Publication date: August 22, 2013Applicant: ATI Technologies ULCInventor: ATI Technologies ULC
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Publication number: 20130215128Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.Type: ApplicationFiled: March 18, 2013Publication date: August 22, 2013Applicant: ATI Technologies ULCInventor: ATI Technologies ULC
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Publication number: 20130182069Abstract: A method, an apparatus, and a non-transitory computer readable medium for performing 2D to 3D conversion are presented. A 2D input source is extracted into left and right 3D images. Motion vectors are calculated for the left and right 3D images. Frame rate conversion is performed on the left 3D image and the right 3D image, using the respective calculated motion vectors, to produce motion compensated left and right 3D images. The left and right 3D images and the motion compensated left and right 3D images are reordered for display.Type: ApplicationFiled: March 5, 2013Publication date: July 18, 2013Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: ATI Technologies ULC, Advanced Micro Devices, Inc.
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Publication number: 20130166875Abstract: In various embodiments, dedicated mask pins are eliminated by sending a data mask on address lines of the interface. A memory controller receives a request for a memory write operation from a memory client and determines the granularity of the write data from a write data mask sent by the client. Granularity, as used herein, indicates a quantity of write data to which each bit of the received write data mask applies. In an embodiment, the memory controller generates a particular write command and a particular write data mask based on the granularity of the write data. The write command generated is typically the most efficient of several write commands available, but embodiments are not so limited. The write command is transmitted on command lines of the interface, and the write data mask is transmitted on address lines of the interface.Type: ApplicationFiled: February 26, 2013Publication date: June 27, 2013Applicant: ATI TECHNOLOGIES ULCInventor: ATI Technologies ULC
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Publication number: 20130162911Abstract: A video source, a display and a method of processing multilayered video are disclosed. The video source decodes a multilayered video bit stream to transmit synchronized streams of decompressed video images and corresponding overlay images to an interconnected display. The display receives separate streams of video and overlay images. Transmission and reception of corresponding video and overlay images is synchronized in time. A video image received in the display can be selectively processed separately from its corresponding overlay image. The video image as processed at the display is later composited with its corresponding overlay image to form an output image for display.Type: ApplicationFiled: December 21, 2012Publication date: June 27, 2013Applicant: ATI Technologies ULCInventor: ATI Technologies ULC
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Publication number: 20130148947Abstract: A device and method for playing digital video are disclosed. The device includes multiple graphics processing units. The method involves using the multiple graphics processors to decode and output compressed audiovisual stream to a display and a speaker. Audiovisual bit streams possibly containing multi-stream video are efficiently decoded and displayed by sharing decoding-related tasks among multiple graphical processing units.Type: ApplicationFiled: December 13, 2012Publication date: June 13, 2013Applicant: ATI TECHNOLOGIES ULCInventor: ATI Technologies ULC
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Publication number: 20130147815Abstract: Embodiments of a multi-processor architecture and method are described herein. Embodiments provide alternatives to the use of an external bridge integrated circuit (IC) architecture. For example, an embodiment multiplexes a peripheral bus such that multiple processors can use one peripheral interface slot without requiring an external bridge IC. Embodiments are usable with known bus protocols.Type: ApplicationFiled: February 11, 2013Publication date: June 13, 2013Applicants: ATI TECHNOLOGIES ULC, ADVANCED MICRO DEVICESInventors: Advanced Micro Devices, ATI Technologies ULC
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Publication number: 20130032941Abstract: A routing layer for a semiconductor die is disclosed. The routing layer includes traces interconnecting integrated circuit bond-pads to UBMs. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces arranged underneath the UBMs as to absorb stress from solder bumps attached to the UMBs. Traces beneath the UBMs protect parts of the underlying dielectric material proximate the solder bumps, from the stress.Type: ApplicationFiled: October 8, 2012Publication date: February 7, 2013Applicant: ATI TECHNOLOGIES ULCInventor: ATI Technologies ULC