Patents by Inventor Atiqul Baree
Atiqul Baree has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8385853Abstract: A system for detecting power output of a power amplifier includes a first power detector configured to detect a forward power output of a power amplifier, the first power detector configured to provide a first power detector output, and a second power detector configured to receive a collector parameter signal and detect a collector parameter therefrom, the second power detector also configured to provide a second power detector output.Type: GrantFiled: May 8, 2008Date of Patent: February 26, 2013Assignee: Skyworks Solutions, Inc.Inventors: Dima Prikhodko, Gene A. Tkachenko, Atiqul Baree, Steven C. Sprinkle, Paul T. Dicarlo
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Patent number: 8351873Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: GrantFiled: March 14, 2012Date of Patent: January 8, 2013Assignee: Skyworks Solutions, Inc.Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Publication number: 20120171971Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: ApplicationFiled: March 14, 2012Publication date: July 5, 2012Applicant: SKYWORKS SOLUTIONS, INC.Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Patent number: 8140028Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: GrantFiled: May 8, 2008Date of Patent: March 20, 2012Assignee: Skyworks Solutions, Inc.Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Publication number: 20080299916Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.Type: ApplicationFiled: May 8, 2008Publication date: December 4, 2008Inventors: Florinel G. Balteanu, David S. Ripley, Atiqul Baree, Christian Cojocaru, Paul T. Dicarlo
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Publication number: 20080284520Abstract: A system for detecting power output of a power amplifier includes a first power detector configured to detect a forward power output of a power amplifier, the first power detector configured to provide a first power detector output, and a second power detector configured to receive a collector parameter signal and detect a collector parameter therefrom, the second power detector also configured to provide a second power detector output.Type: ApplicationFiled: May 8, 2008Publication date: November 20, 2008Inventors: Dima Prikhodko, Gene A. Tkachenko, Atiqul Baree, Steven C. Sprinkle, Paul T. Dicarlo
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Patent number: 7304541Abstract: A voltage regulator integrated with a monolithic microwave integrated circuit (MMIC) power amplifier that supplies a regulated bias current to the MMIC power amplifier that is compensated for temperature and voltage supply variations. The regulator circuit includes HBT transistors for current mirrors and a voltage regulator where a base-emitter voltage drop compensates for a similar base emitter drop in the current mirrors. The regulator circuit is designed to maintain constant the bias voltage and mirror currents with changes in Vcc and temperature. The compensated constant bias current to the MMIC power amplifier maintains uniform operating parameters for the power amplifier.Type: GrantFiled: August 3, 2005Date of Patent: December 4, 2007Assignee: Fairchild Semiconductor CorporationInventors: Atiqul Baree, Mikhail Shirokov
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Patent number: 7157966Abstract: A power amplifier includes an input network, output stages, coupled in parallel and configured to output power optimally in corresponding power-ranges, the output stages coupled to the input network, an output impedance matching network, coupled to the output stages and not containing a switching element, and a bias-control network, coupled between the output impedance matching network, the input network, and the output stages. In some amplifiers the output impedance matching network does not contain a switching element corresponding to the output stage configured to output power in the highest range. In other amplifiers the bias-control network is configured to isolate output stages by providing a hard shut-off to transistors of the isolated output stages.Type: GrantFiled: December 17, 2004Date of Patent: January 2, 2007Assignee: Fairchild Semiconductor CorporationInventors: Atiqul Baree, Gary Hau, Mikhail Shirokov, James A. Roche, Jr.
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Publication number: 20060284684Abstract: A voltage regulator integrated with a monolithic microwave integrated circuit (MMIC) power amplifier that supplies a regulated bias current to the MMIC power amplifier that is compensated for temperature and voltage supply variations. The regulator circuit includes HBT transistors for current mirrors and a voltage regulator where a base-emitter voltage drop compensates for a similar base emitter drop in the current mirrors. The regulator circuit is designed to maintain constant the bias voltage and mirror currents with changes in Vcc and temperature. The compensated constant bias current to the MMIC power amplifier maintains uniform operating parameters for the power amplifier.Type: ApplicationFiled: August 3, 2005Publication date: December 21, 2006Inventors: Atiqul Baree, Mikhail Shirokov
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Publication number: 20060132232Abstract: A power amplifier includes an input network, output stages, coupled in parallel and configured to output power optimally in corresponding power-ranges, the output stages coupled to the input network, an output impedance matching network, coupled to the output stages and not containing a switching element, and a bias-control network, coupled between the output impedance matching network, the input network, and the output stages. In some amplifiers the output impedance matching network does not contain a switching element corresponding to the output stage configured to output power in the highest range. In other amplifiers the bias-control network is configured to isolate output stages by providing a hard shut-off to transistors of the isolated output stages.Type: ApplicationFiled: December 17, 2004Publication date: June 22, 2006Inventors: Atiqul Baree, Gary Hau, Mikhail Shirokov, James Roche