Patents by Inventor Atishay

Atishay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11360840
    Abstract: Embodiments of present disclosure relates to method and apparatus for performing redundancy analysis of a semiconductor device. For the redundancy analysis, plurality of banks in the semiconductor device is classified to be associated with a cluster from plurality of clusters. The classification is based on one or more attributes associated with the plurality of banks. Further, at least one cluster parameter for the plurality of clusters and at least one bank parameter for the plurality of banks, is determined. One or more algorithms is mapped with the plurality of clusters, based on the at least one cluster parameter and the at least one bank parameter. The redundancy analysis of at least one bank in the plurality of clusters is performed based on the mapping.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: June 14, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Atishay, Prasanth B
  • Patent number: 11195568
    Abstract: Methods and systems for controlling refresh operations of a memory device. A method disclosed herein includes receiving, by a refresh controller of the memory device, a refresh command from a host for performing the refresh operation on a plurality of memory rows. The method further includes selecting, by the refresh controller, at least one memory row from the plurality of memory rows for the refresh operation using a refresh-row selection circuitry. The at least one memory row is selected by performing digital reading or analog reading of at least one row condition cell (RCC) and at least one supplemental cell that are connected to each memory row of the memory rows. The method further includes performing, by the refresh controller, the refresh operation on the selected at least one memory row.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: December 7, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Atishay, Anirudh B K, Rajeev Verma, Vishnu Charan Thummala
  • Publication number: 20210224146
    Abstract: Embodiments of present disclosure relates to method and apparatus for performing redundancy analysis of a semiconductor device. For the redundancy analysis, plurality of banks in the semiconductor device is classified to be associated with a cluster from plurality of clusters. The classification is based on one or more attributes associated with the plurality of banks. Further, at least one cluster parameter for the plurality of clusters and at least one bank parameter for the plurality of banks, is determined. One or more algorithms is mapped with the plurality of clusters, based on the at least one cluster parameter and the at least one bank parameter. The redundancy analysis of at least one bank in the plurality of clusters is performed based on the mapping.
    Type: Application
    Filed: July 20, 2020
    Publication date: July 22, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Atishay, Prasanth B