Abstract: A memory stores dummy data including a first data area having more “0” than “1” of a binary logic and a second data area having more “1” than “0” of the binary logic. An ECC processor detects a first error bit number related to the first data area and a second error bit number related to the second data area. A calculator calculates a relative difference of the first error bit number from the second error bit number. A comparator compares the relative difference with a predetermined value. A corrector corrects a read voltage on the basis of a result of comparison by the comparator.

Abstract: Provided is a non-volatile storage system that performs error correction processing at high speed while ensuring error correction capability. When error correction decoding processing using data read first with hard-decision decoding processing has failed, a non-volatile storage device 2 reads data on the same page again, performs diversity synthesis processing on the readout data for the first time and the readout data for the second time on the same page as one for the first time, and then performs error correction processing using data after diversity synthesis processing.

Abstract: A memory stores dummy data including a first data area having more “0” than “1” of a binary logic and a second data area having more “1” than “0” of the binary logic. An ECC processor detects a first error bit number related to the first data area and a second error bit number related to the second data area. A calculator calculates a relative difference of the first error bit number from the second error bit number. A comparator compares the relative difference with a predetermined value. A corrector corrects a read voltage on the basis of a result of comparison by the comparator.

Abstract: Provided is a non-volatile storage system that performs error correction processing at high speed while ensuring error correction capability. When error correction decoding processing using data read first with hard-decision decoding processing has failed, a non-volatile storage device 2 reads data on the same page again, performs diversity synthesis processing on the readout data for the first time and the readout data for the second time on the same page as one for the first time, and then performs error correction processing using data after diversity synthesis processing.

Abstract: A file management information area of a memory includes a FAT and a replacement information table. In the FAT, chain information on a file is recorded and in the replacement information table, replacement information of a defective area is recorded. In order to read out the file, a file system reads out the FAT and the replacement information table to generate indexes of the file and stores the indexes to an index buffer. In a memory controller, an address part of a read command is sequentially replaced with indexes stored in the index buffer and page-replaced read commands are continuously transferred to the memory.

Abstract: In a memory, a file is stored at discontinuous page addresses. The information thereon is recorded in FAT of the memory. When an application program in a host system performs a read operation for the file, a FAT system refers to the FAT to read out page indexes of the file. Then, the page indexes are stored in a page index buffer included in a memory controller. When a DMAC outputs a read command, a page index transfer sequencer replaces an address part of this read command with the page indexes and outputs page-replaced read commands to the memory.