Abstract: According to an embodiment, a storage device includes a plurality of memory nodes and a control unit. Each of the memory nodes includes a storage unit including a plurality of storage areas having a predetermined size. The memory nodes are connected to each other in two or more different directions. The memory nodes constitute two or more groups each including two or more memory nodes. The control unit is configured to sequentially allocate data writing destinations in the storage units to the storage areas respectively included in the different groups.

Abstract: According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes an interface, a memory block, an address acquisition circuit and a controller. The interface receives a data write/read request or a request based on the key-value store. The memory block has a data area for storing data and a metadata table containing the key-value data. The address acquisition circuit acquires an address in response to input of the key. The controller executes the data write/read request for the memory block, and outputs the address acquired to the memory block and executes the request based on the key-value store. The controller outputs the value corresponding to the key via the interface.

Abstract: According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

Abstract: According to one embodiment, a storage system includes a storage which includes a plurality of node memories including a nonvolatile memory and a control unit which controls the nonvolatile memory and a routing unit which controls packet transfer between two or more of the node memories, a connection unit which connects the storage unit to outside and controls the storage unit, and a management unit which at least monitors power supply voltages of the storage and the connection unit.

Abstract: According to one embodiment, a storage system includes a storage which includes a plurality of node memories including a nonvolatile memory and a control unit which controls the nonvolatile memory, a routing unit which controls packet transfer between two or more of the node memories, and a packet control unit which analyzes the packet transferred from the routing unit.

Abstract: According to one embodiment, a storage system includes a storage which includes a plurality of node memories including a nonvolatile memory and a control unit which controls the nonvolatile memory, a routing unit which controls packet transfer between two or more of the node memories, and a packet control unit which analyzes the packet transferred from the routing unit.

Abstract: According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

Abstract: A storage system includes a plurality of storage nodes, each including a local processor and one or more non-volatile memory devices, a first control node having a first processor and directly connected to a first storage node, a second control node having a second processor and directly connected to a second storage node. The local processor of a node controls access to the non-volatile memory devices of said node and processes read and write commands issued from the first and second processors that are targeted for said node. Each of the first and second processors is configured to issue read commands to any of the storage nodes, and issue write commands only to a group of storage nodes allocated thereto, such that none of the storage nodes can be targeted by both the first and second processors.

Abstract: According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

Abstract: According to one embodiment, a storage system includes a storage which includes a plurality of node memories including a nonvolatile memory and a control unit which controls the nonvolatile memory, a routing unit which controls packet transfer between two or more of the node memories, and a packet control unit which analyzes the packet transferred from the routing unit.

Abstract: According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes an interface, a memory block, an address acquisition circuit and a controller. The interface receives a data write/read request or a request based on the key-value store. The memory block has a data area for storing data and a metadata table containing the key-value data. The address acquisition circuit acquires an address in response to input of the key. The controller executes the data write/read request for the memory block, and outputs the address acquired to the memory block and executes the request based on the key-value store. The controller outputs the value corresponding to the key via the interface.

Abstract: According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes an interface, a memory block, an address acquisition circuit and a controller. The interface receives a data write/read request or a request based on the key-value store. The memory block has a data area for storing data and a metadata table containing the key-value data. The address acquisition circuit acquires an address in response to input of the key. The controller executes the data write/read request for the memory block, and outputs the address acquired to the memory block and executes the request based on the key-value store. The controller outputs the value corresponding to the key via the interface.

Abstract: According to one embodiment, a memory device includes first and second fin type stacked structures each includes first to i-th memory strings (i is a natural number except 1) that are stacked in a first direction, the first and second fin type stacked structures which extend in a second direction and which are adjacent in a third direction, a first portion connected to one end in the second direction of the first fin type stacked structure, a width in the third direction of the first portion being greater than a width in the third direction of the first fin type stacked structure, and a second portion connected to one end in the second direction of the second fin type stacked structure, a width in the third direction of the second portion being greater than a width in the third direction of the second fin type stacked structure.

Abstract: A storage system includes a memory unit group that includes a first memory unit and a plurality of second memory units, and the first memory unit is connected to the plurality of second memory units so that data can be transmitted between the first memory unit and the second memory units. The plurality of second memory units is mounted on a same first substrate. One second memory unit of the plurality of second memory units cooperates with the first memory unit and does not cooperate with the other second memory units of the plurality of second memory units.

Abstract: According to one embodiment, a storage system includes a plurality of memory nodes that are connected to each other in a plurality of different directions. Each memory node stores a count value. Each memory node, when receiving an update command of which destination is not own memory node, transmits the update commando to other memory nodes connected thereto. Each memory node, when receiving an update command of which destination is own memory node, executes the update command, increases the stored count value, and issues a notice indicating the increased count value.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes fin-type stacked layer structures. Each of the structures includes semiconductor layers stacked in a perpendicular direction. Assist gate electrodes are disposed in an in-plane direction and divided on a surface in the perpendicular direction of the structures.

Abstract: According to one embodiment, a storage system includes a plurality of memory units including a nonvolatile memory and a control unit which controls the nonvolatile memory, a routing unit which controls transfer of a packet between the memory units. The routing unit uses a partial address described in the packet and not the full address.

Abstract: According to one embodiment, a memory device includes first and second fin type stacked structures each includes first to i-th memory strings (i is a natural number except 1) that are stacked in a first direction, the first and second fin type stacked structures which extend in a second direction and which are adjacent in a third direction, a first portion connected to one end in the second direction of the first fin type stacked structure, a width in the third direction of the first portion being greater than a width in the third direction of the first fin type stacked structure, and a second portion connected to one end in the second direction of the second fin type stacked structure, a width in the third direction of the second portion being greater than a width in the third direction of the second fin type stacked structure.

Abstract: A storage device includes a storage unit and connection units. The storage unit has routing circuits electrically networked with each other, each of the routing circuits being locally connected to a plurality of node modules, each of the node modules including a nonvolatile memory device and is configured to count a number of times write operations have been carried out with respect thereto and output the counted number. Each of the connection units is connected to one or more of the routing circuits, and configured to access each of the node modules through one or more of the routing circuits, in accordance with access requests from a client, and maintains, in each entry of a table, a key address of data written thereby and attributes of the data, the attributes including the number of times corresponding to a nonvolatile memory device into which the data have been written.

Abstract: A storage device includes a storage unit having a plurality of routing circuits networked with each other, each of the routing circuits configured to route packets to a plurality of node modules that are connected thereto, each of the node modules including nonvolatile memory, and a plurality of connection units, each coupled with one or more of the routing circuits, and configured to access each of the node modules through one or more of the routing circuits. Each of the connection units is configured to transmit an inquiry to a target node module, to initiate a write operation, and determine whether or not to transmit a write command based on a notice returned by the target node module in response to the inquiry.