Abstract: A catalyst laminate includes a plurality of catalyst layers containing at least one of a noble metal and an oxide of the noble metal and at least one of a non-noble metal and an oxide of the non-noble metal, including: two or more first catalyst layers and two or more second catalyst layers. In an atomic percent of the noble metal obtained by using a line analysis by energy dispersive X-ray spectroscopy in a thickness direction of the catalyst laminate. The first catalyst layer is less than an average of a highest value and a lowest value of the atomic percent of the noble metal. The second catalyst layer has an atomic percent of the noble metal equal to or greater than the average of the highest value and the lowest value thereof. The second catalyst layer is present between the first catalyst layers.

Abstract: A catalyst of an embodiment includes a porous structure including aggregates of particles containing Ru and metal atoms M different from Ru. The particles are a metal oxide. A metal atom ratio of the metal atom M in a surface region of the porous structure is higher than that of the metal atom M in the porous structure as a whole.

Abstract: An electrode includes a base material, and a catalyst layer provided on the base material, the catalyst layer including a plurality of catalyst units having a porous structure. The catalyst layer has a first catalyst layer provided near the base material, the first catalyst layer including a plurality of the catalyst units dispersed at a first dispersion degree. The catalyst layer has a second catalyst layer provided above the first catalyst layer, the second catalyst layer including a plurality of the catalyst units dispersed at a second dispersion degree. The second dispersion degree is different from the first dispersion degree.

Abstract: A method of manufacturing a photoelectric conversion device of an embodiment includes: forming a layer on a substrate; and drying this layer. The layer contains a p-type semiconductor, an n-type semiconductor, and a compound represented by the following formula (1). The layer is dried under pressures of 100 Pa or less and substrate temperatures of 40 to 200° C.

Abstract: A catalyst laminate includes a plurality of catalyst layers containing at least one of a noble metal and an oxide of the noble metal and at least one of a non-noble metal and an oxide of the non-noble metal, including: two or more first catalyst layers and two or more second catalyst layers. In an atomic percent of the noble metal obtained by using a line analysis by energy dispersive X-ray spectroscopy in a thickness direction of the catalyst laminate. The first catalyst layer is less than an average of a highest value and a lowest value of the atomic percent of the noble metal. The second catalyst layer has an atomic percent of the noble metal equal to or greater than the average of the highest value and the lowest value thereof. The second catalyst layer is present between the first catalyst layers.

Abstract: A catalyst of an embodiment includes a porous structure including aggregates of particles containing Ru and metal atoms M different from Ru. The particles are a metal oxide. A metal atom ratio of the metal atom M in a surface region of the porous structure is higher than that of the metal atom M in the porous structure as a whole.

Abstract: A photoelectric conversion device includes: an element substrate having a first electrode, a photoelectric conversion layer, and a second electrode, the photoelectric conversion layer being provided above the first electrode and performing charge separation by energy of irradiated light, and the second electrode being provided above the photoelectric conversion layer; a counter substrate facing the element substrate; and a sealing layer provided between the element substrate and the counter substrate. The element substrate, the counter substrate, and the sealing layer define a sealing region sealing the photoelectric conversion layer. The element substrate further has: an impurity detection layer in contact with the second electrode inside the sealing region and causing chemical reaction with an impurity containing at least one of oxygen and water; and a third electrode in contact with the impurity detection layer and extending to the outside of the sealing region.

Abstract: A solar cell module according to an embodiment includes: a light transmissive first substrate; a second substrate; at least one cell array disposed between the first substrate and the second substrate, the cell array including a plurality of cells arranged, each of the cells including a first electrode disposed on the first substrate, an organic photoelectric conversion film disposed on the first electrode, and a second electrode disposed on the organic photoelectric conversion film; a plurality of light transmissive partition walls disposed at portions on the first substrate, the portions being located between adjacent ones of the cells and at both end portions of the cell array; and a first resin film disposed between the second substrate and each of the cells between adjacent ones of the partition walls, the cells being connected in series.

Abstract: A membrane electrode assembly includes a pair of electrodes, each having a feeder layer that is porous and made of a conductive material, and an electrolyte membrane disposed between the pair of electrodes. At least one of the electrodes has a catalyst layer disposed in the feeder layer. In a cross section of the feeder layer, an electrolyte exists in a first region less than or equal to 80% of a thickness of the feeder layer from the electrolyte membrane toward an opposite direction to the electrolyte membrane, the catalyst layer exists at 50% or more of an outer circumference of a cross section of the conductive material in the first region, and the catalyst layer exists at 10% or less of the outer circumference of the cross section of the conductive material in a second region other than the first region.

Abstract: An electrode of an embodiment includes a base material, and a catalyst layer provided on the base material and having a porous structure. When a sum of heights of all peaks belonging to Ir oxide is I0, the height of a peak of IrO2 (110) is I1, and the height of a peak of IrO2 (211) is I2, a ratio of (I1+I2)/I0, which is a ratio of spectra obtained by X-ray diffraction measurements using K? rays of Cu in the catalyst layer, is 50% or more and 100% or less in a range of a diffraction angle of 20 degrees or more and 70 degrees or less.

Abstract: According to one embodiment, a photoelectric conversion element includes a first electrode, a second electrode, a photoelectric conversion layer and a first layer. The photoelectric conversion layer is provided between the first electrode and the second electrode. The first layer is provided between the first electrode and the photoelectric conversion layer. The first layer includes at least a first metal oxide. The first layer has a plurality of orientation planes. At least one of the orientation planes satisfies the relationship L1>L2, where L1 is a length of the one of the plurality of orientation planes, and L2 is a thickness of the first layer along a first direction. The first direction is from the first electrode toward the second electrode.

Abstract: A laminated electrolyte membrane of an embodiment includes: a hydrocarbon-based electrolyte membrane; and a composite electrolyte membrane laminated with the hydrocarbon-based electrolyte, the composite electrolyte membrane containing a perfluorosulfonic acid-based electrolyte and a superstrong acid metal oxide having an acid function (H0) of ?12 or less.

Abstract: A wiring board of an embodiment includes a through via, a first insulating film disposed around the through via, a second insulating film disposed around the first insulating film, a third insulating film disposed around the second insulating film and a resin disposed around the third insulating film. The resin includes fillers. The second insulating film has a relative permittivity lower than a relative permittivity of the first insulating film. The third insulating film has a relative permittivity higher than a relative permittivity of the second insulating film.

Abstract: An electrode of an embodiment includes a substrate, an intermediate layer provided on the substrate, and a catalyst layer provided on the intermediate layer. The intermediate layer is a mixture that includes two or more substances among a compound, and single element of noble metal or an alloy including noble metal. In a composition ratio of the mixture, a composition ratio of the intermediate layer in the vicinity of an interface between the substrate and the intermediate layer is different from a composition ratio of the intermediate layer in the vicinity of an interface between the catalyst layer and the intermediate layer.

Abstract: An antenna device of the present embodiment includes: a first conductive layer connected to a ground potential, a semiconductor device provided above the first conductive layer, a second conductive layer provided above the semiconductor device, a first via connecting the second conductive layer and the first conductive layer, a third conductive layer provided above the second conductive layer, a second via passing through the first opening, and an antenna provided above the third conductive layer. A dielectric is provided between the second conductive layer and the semiconductor device, between the third conductive layer and the second conductive layer, and between the antenna and the third conductive layer. The second conductive layer includes a first opening. The second via connects the third conductive layer and the first conductive layer.

Abstract: An electrode of an embodiment includes a base material, and a catalyst layer provided on the base material and having a porous structure. When a sum of heights of all peaks belonging to Ir oxide is I0, the height of a peak of IrO2 (110) is T1, and the height of a peak of IrO2 (211) is I2, a ratio of (I1+I2)/I0, which is a ratio of spectra obtained by X-ray diffraction measurements using K? rays of Cu in the catalyst layer, is 50% or more and 100% or less in a range of a diffraction angle of 20 degrees or more and 70 degrees or less.

Abstract: A connection member according to an embodiment includes a dielectric material, a penetrating via penetrating through the dielectric material, a first metal plane provided in the dielectric material, the first metal plane being perpendicular to an extension direction of the penetrating via, the first metal plane crossing the penetrating via, and a second metal plane provided n or on the dielectric material in parallel with the extension direction of the penetrating via, the second metal plane connected to the first metal plane.

Abstract: An electrode includes a base material, and a catalyst layer provided on the base material, the catalyst layer including a plurality of catalyst units having a porous structure. The catalyst layer has a first catalyst layer provided near the base material, the first catalyst layer including a plurality of the catalyst units dispersed at a first dispersion degree. The catalyst layer has a second catalyst layer provided above the first catalyst layer, the second catalyst layer including a plurality of the catalyst units dispersed at a second dispersion degree. The second dispersion degree is different from the first dispersion degree.

Abstract: A connection member according to an embodiment includes a dielectric material, a penetrating via penetrating through the dielectric material, a first metal plane provided in the dielectric material, the first metal plane being perpendicular to an extension direction of the penetrating via, the first metal plane crossing the penetrating via, and a second metal plane provided n or on the dielectric material in parallel with the extension direction of the penetrating via, the second metal plane connected to the first metal plane.

Abstract: A reconfigured wafer of resin-encapsulated semiconductor packages is obtained by supporting with a resin, thereafter, a grinding process is performed on top and backside surfaces to expose only a bump interconnection electrode on a surface of a semiconductor chip. Further, a chip-scale package is obtained by a dicing process along a periphery of the chip.