Patents by Inventor Atsuko Seki

Atsuko Seki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9286951
    Abstract: According to one embodiment, there are provided a memory which is provided on a circuit board, a controller which is provided on the circuit board and controls the memory, and a signal line which is formed on the circuit board and configured to perform data transmission between the controller and the memory, in which a width of the signal line in the place where the signal line is led out from the memory is large compared with a place disposed under the memory.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: March 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Okada, Atsuko Seki
  • Publication number: 20150124541
    Abstract: According to one embodiment, there are provided a memory which is provided on a circuit board, a controller which is provided on the circuit board and controls the memory, and a signal line which is formed on the circuit board and configured to perform data transmission between the controller and the memory, in which a width of the signal line in the place where the signal line is led out from the memory is large compared with a place disposed under the memory.
    Type: Application
    Filed: January 12, 2015
    Publication date: May 7, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takashi OKADA, Atsuko Seki
  • Patent number: 8581372
    Abstract: According to one embodiment, a semiconductor storage device includes a plate and an external connection terminal. The plate is molded in a resin mold section. A semiconductor memory chip is placed on the plate. The external connection terminal is exposed to the outer circumferential surface of the semiconductor storage device. The plate includes a plurality of exposed portions exposed to the outer circumferential surface of the resin mold section. The plurality of exposed portions is electrically insulated from each other inside the resin mold section.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: November 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junichi Asada, Taku Nishiyama, Atsuko Seki
  • Publication number: 20130286603
    Abstract: According to one embodiment, there are provided a memory which is provided on a circuit board, a controller which is provided on the circuit board and controls the memory, and a signal line which is formed on the circuit board and configured to perform data transmission between the controller and the memory, in which a width of the signal line in the place where the signal line is led out from the memory is large compared with a place disposed under the memory.
    Type: Application
    Filed: October 31, 2012
    Publication date: October 31, 2013
    Inventors: Takashi OKADA, Atsuko SEKI
  • Publication number: 20120049378
    Abstract: According to one embodiment, a semiconductor storage device includes a plate and an external connection terminal. The plate is molded in a resin mold section. A semiconductor memory chip is placed on the plate. The external connection terminal is exposed to the outer circumferential surface of the semiconductor storage device. The plate includes a plurality of exposed portions exposed to the outer circumferential surface of the resin mold section. The plurality of exposed portions is electrically insulated from each other inside the resin mold section.
    Type: Application
    Filed: March 18, 2011
    Publication date: March 1, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Junichi Asada, Taku Nishiyama, Atsuko Seki